1347 commits

Author	SHA1	Message	Date
xmrig	0290b1ed3c	Merge pull request #1493 from SChernykh/dev ... Update MSR preset for Intel	2020-01-09 14:24:11 +07:00
SChernykh	869209389e	Update MSR preset for Intel ... As per https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184	2020-01-09 08:10:36 +01:00
XMRig	c6530e352f	Code cleanup.	2020-01-07 10:13:01 +07:00
SChernykh	eb20dfbc94	JIT compiler tweaks	2020-01-06 13:57:48 +01:00
XMRig	88ff807700	Fix compile warnings.	2020-01-03 19:11:48 +07:00
XMRig	e76e75cdff	Merge branch 'dev' of github.com:xmrig/xmrig into dev	2020-01-03 05:36:47 +07:00
XMRig	083c61754b	Fixed unwanted resume after dataset change.	2020-01-03 05:36:22 +07:00
SChernykh	c9f90e6770	Refactor Ryzen fix to fix compilation issues	2019-12-31 11:55:07 +02:00
SChernykh	29dd2c2138	Cleanup	2019-12-30 20:55:03 +02:00
SChernykh	4e5aef0a8a	Auto-config for mobile Ryzen APUs	2019-12-30 20:53:21 +02:00
XMRig	039c42b1fe	v5.5.1-dev	2019-12-30 16:05:51 +07:00
XMRig	d64bbfa9c0	#1469 Fixed build with gcc 4.8.	2019-12-30 16:04:07 +07:00
XMRig	d5605a29b4	v5.5.0	2019-12-29 21:42:11 +07:00
XMRig	a5b0bc04cc	Add "cn/ultra" alias for tlo-pool.raasu.org pool.	2019-12-29 15:36:05 +07:00
XMRig	402c44b547	Added "cn-pico/tlo".	2019-12-29 00:29:19 +07:00
XMRig	ac4086b273	Fix build.	2019-12-28 02:00:08 +07:00
XMRig	f00769f758	Code style cleanup.	2019-12-28 01:45:54 +07:00
SChernykh	3a2941b719	Fix for 1st-gen Ryzen crashes	2019-12-27 12:40:38 +02:00
XMRig	4a9a7434f6	Revert Platform::setProcessPriority	2019-12-27 03:19:03 +07:00
XMRig	dbb721cb5e	Removed "rx/v" algorithm.	2019-12-26 22:34:19 +07:00
XMRig	7dfb4d9dc0	v5.5.0-dev	2019-12-25 04:53:38 +07:00
XMRig	22eca8e0d5	Fixed memory allocation checks.	2019-12-25 04:39:21 +07:00
XMRig	ecb46643e2	Added support for alternative CUDA plugin API.	2019-12-25 00:35:43 +07:00
XMRig	2e4a83547d	Add console title for Windows.	2019-12-24 02:04:34 +07:00
XMRig	ea7aa4ccef	Fixed MSVC build.	2019-12-23 00:37:43 +07:00
XMRig	f9d07229b4	Add extra variables.	2019-12-23 00:28:57 +07:00
XMRig	2d15c10e0f	Added ENV support for "loader" option.	2019-12-22 19:48:33 +07:00
XMRig	5bd6a1c028	Added ENV support for "user", "pass" and "rig-id" fields.	2019-12-22 19:09:30 +07:00
XMRig	356e666e61	Added Env class.	2019-12-22 18:09:26 +07:00
XMRig	bdf12bca0f	Make Process::location static.	2019-12-22 13:26:06 +07:00
XMRig	c44ae06d54	Added --randomx-no-rdmsr command line option.	2019-12-21 23:57:25 +07:00
XMRig	c7de9e6561	v5.4.1-dev	2019-12-21 23:42:18 +07:00
XMRig	8f2a92c3ec	v5.4.0	2019-12-21 16:12:02 +07:00
XMRig	98cfe7ed37	Added extra error message.	2019-12-20 23:44:32 +07:00
XMRig	449617d717	Allow use old CUDA plugin.	2019-12-20 21:10:13 +07:00
XMRig	049caabdae	Add missing algorithm name alias.	2019-12-20 04:08:47 +07:00
XMRig	2911bb3a81	Fix OpenCL.	2019-12-20 04:05:09 +07:00
Tony Butler	45412a2ace	Add MoneroV (rx/v) algorithm [based on MoneroOcean/master]	2019-12-18 16:17:22 -07:00
XMRig	f4cedd7b63	Fixed MsrItem serialization.	2019-12-19 03:49:32 +07:00
XMRig	3e3d34b3ce	Allow number value for "wrmsr" option only for Intel.	2019-12-19 03:28:05 +07:00
XMRig	12fb27e2cf	Use MsrItem::kNoMask.	2019-12-19 03:20:48 +07:00
SChernykh	c01c035269	Fixed crash with GCC compiler	2019-12-18 17:32:57 +01:00
SChernykh	f85aba5d21	Fixed AVX detection	2019-12-18 12:20:21 +01:00
SChernykh	f8bf8fddd9	Update jit_compiler_x86_static.S	2019-12-18 09:13:21 +01:00
SChernykh	7459677fd5	Add vzeroupper for processors with AVX ... To avoid false dependencies on upper 128 bits of YMM registers.	2019-12-18 09:12:25 +01:00
SChernykh	59e8fdb9ed	Added bit masks for MSR registers	2019-12-17 23:55:22 +01:00
XMRig	5142a406b0	Less error prone log interface.	2019-12-18 02:20:31 +07:00
XMRig	3cc8b19ca0	Added command line option --verbose.	2019-12-17 22:03:50 +07:00
XMRig	f8865b1498	Added "verbose" option.	2019-12-17 21:46:11 +07:00
XMRig	969821296f	Merge branch 'feature-custom-msr' into dev	2019-12-17 16:53:28 +07:00
XMRig	a877b1d269	Added save/restore MSR registers on Linux.	2019-12-17 16:17:11 +07:00
XMRig	9cea70b77c	Rename Rx_windows.cpp to Rx_win.cpp.	2019-12-17 15:16:37 +07:00
XMRig	d2d501c821	Added RandomX option "rdmsr" and save/restore MSR registers on Windows.	2019-12-17 14:45:01 +07:00
XMRig	a5089638ea	#1421 Added limit for maximum send buffer size.	2019-12-17 03:18:25 +07:00
XMRig	17f82280d0	v5.4.0-dev	2019-12-17 02:52:47 +07:00
XMRig	8bef964f68	Added support for write custom MSR.	2019-12-17 02:27:07 +07:00
SChernykh	4da37baf8c	RandomSFX (Safex Cash variant) support	2019-12-16 19:36:29 +01:00
XMRig	33e7a54c29	#1421 Use dynamic size send buffer.	2019-12-16 14:09:03 +07:00
XMRig	1d4c8dda96	#1423 Implemented driver reuse.	2019-12-16 03:41:58 +07:00
XMRig	b633b593ad	Strict wrmsr error handling.	2019-12-16 02:45:07 +07:00
XMRig	8dbb83f99b	Revert changes.	2019-12-16 02:17:57 +07:00
SChernykh	2e001677df	Use unique service name for WinRing0 driver ... To avoid error 1072	2019-12-15 19:28:14 +01:00
XMRig	be253808d4	v5.3.1-dev	2019-12-16 00:17:08 +07:00
xmrig	06c70a7cd9	Merge pull request #1418 from jtgrassie/buffer-size ... increase stratum send buffer size	2019-12-15 15:38:27 +07:00
XMRig	dccf7f9ae7	v5.3.0	2019-12-15 15:34:27 +07:00
Jethro Grassie	348916040c	increase stratum send buffer size	2019-12-15 03:23:07 -05:00
XMRig	6adba6dad4	Removed unnecessary check.	2019-12-15 12:02:45 +07:00
XMRig	fb5b873524	Added missing tag.	2019-12-15 01:52:20 +07:00
XMRig	5d0fd2dc8e	Unified Linux/Windows MSR log messages.	2019-12-15 01:32:41 +07:00
xmrig	1ad6b5504c	Merge pull request #1416 from SChernykh/dev ... Fixed thread count for MSR mod	2019-12-14 22:41:00 +07:00
SChernykh	222fcfae87	Fixed thread count for MSR mod	2019-12-14 16:30:46 +01:00
XMRig	5a2c3d8396	v5.3.0-dev	2019-12-14 22:30:41 +07:00
XMRig	687617de25	Merge branch 'master' into dev	2019-12-14 22:29:57 +07:00
SChernykh	2e6523aa10	MSR mod for Windows	2019-12-14 16:04:37 +01:00
XMRig	29591609f5	v5.2.1	2019-12-14 13:15:19 +07:00
XMRig	7ff465053b	Added additional MSR registers for Ryzen CPUs.	2019-12-12 14:21:15 +07:00
XMRig	c62ac89081	Fixed potential division by 0.	2019-12-12 14:09:18 +07:00
XMRig	1c58e28124	Don't build Rx_linux.cpp on ARM.	2019-12-11 21:20:37 +07:00
XMRig	96ee721d21	Fixed MSR.	2019-12-11 20:09:25 +07:00
XMRig	de7ed2b968	Added support for AMD specific MSR registers.	2019-12-11 19:37:13 +07:00
XMRig	4fb3086c1c	Fixed --randomx-wrmsr option without parameters.	2019-12-11 19:16:01 +07:00
XMRig	5ab17fcd46	v5.2.1	2019-12-11 17:58:44 +07:00
XMRig	06e105821a	v5.2.0	2019-12-11 14:06:53 +07:00
XMRig	96cfdda9a1	Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N.	2019-12-10 23:57:29 +07:00
XMRig	3b4b230cab	Added CPU vendor enum.	2019-12-10 12:49:42 +07:00
XMRig	6163d27f14	Added command line option --randomx-1gb-pages	2019-12-10 11:56:31 +07:00
SChernykh	ef522f6404	Update jit_compiler_x86_static.S	2019-12-09 20:30:37 +01:00
SChernykh	763691fa4b	More optimizations for Ryzen	2019-12-09 20:29:05 +01:00
SChernykh	9bc13813ba	Fixed assembly selection for RandomX when it's on Auto	2019-12-09 18:59:49 +01:00
XMRig	3edaebb4cf	Move "1gb-pages" option to "randomx" object.	2019-12-09 21:42:40 +07:00
XMRig	558c524e2a	Added missing Cpu::release call.	2019-12-09 01:07:42 +07:00
XMRig	d6582de09b	v5.2.0-dev	2019-12-08 23:23:03 +07:00
XMRig	d32df84ca5	Memory allocation refactoring.	2019-12-08 23:17:39 +07:00
SChernykh	028b335bac	Fix GCC compilation	2019-12-08 16:51:37 +01:00
SChernykh	ffec421408	Fixed indentation	2019-12-08 16:20:46 +01:00
SChernykh	d0df824599	Optimized dataset read for Ryzen CPUs ... Removed register dependency in dataset read, +0.8% speedup on average.	2019-12-08 16:14:02 +01:00
XMRig	4dec063472	Fix summary.	2019-12-08 14:30:44 +07:00
XMRig	86e25a13e3	New summary information about 1GB pages.	2019-12-08 14:21:28 +07:00
XMRig	8ef3e2ec14	Fixed build without hwloc.	2019-12-08 10:20:23 +07:00
XMRig	e9e747f0d1	#1385 "max-threads-hint" option now also limit RandomX dataset initialization threads.	2019-12-07 22:18:06 +07:00