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Added support for AMD specific MSR registers.
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parent
4fb3086c1c
commit
de7ed2b968
2 changed files with 10 additions and 4 deletions
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@ -88,7 +88,7 @@ static bool wrmsr_on_all_cpus(uint32_t reg, uint64_t value)
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free(namelist);
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if (errors) {
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LOG_WARN(CLEAR "%s" YELLOW_BOLD_S "cannot set MSR 0x%04" PRIx32 " to 0x%04" PRIx64, rx_tag(), reg, value);
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LOG_WARN(CLEAR "%s" YELLOW_BOLD_S "cannot set MSR 0x%08" PRIx32 " to 0x%08" PRIx64, rx_tag(), reg, value);
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}
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return errors == 0;
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@ -100,7 +100,7 @@ static bool wrmsr_on_all_cpus(uint32_t reg, uint64_t value)
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void xmrig::Rx::osInit(const RxConfig &config)
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{
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if (config.wrmsr() < 0 || Cpu::info()->vendor() != ICpuInfo::VENDOR_INTEL) {
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if (config.wrmsr() < 0) {
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return;
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}
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@ -110,5 +110,11 @@ void xmrig::Rx::osInit(const RxConfig &config)
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return;
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}
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wrmsr_on_all_cpus(0x1a4, config.wrmsr());
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if (Cpu::info()->vendor() == ICpuInfo::VENDOR_AMD) {
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wrmsr_on_all_cpus(0xC0011022, 0x510000);
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wrmsr_on_all_cpus(0xC001102b, 0x1808cc16);
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}
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else if (Cpu::info()->vendor() == ICpuInfo::VENDOR_INTEL) {
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wrmsr_on_all_cpus(0x1a4, config.wrmsr());
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}
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}
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@ -28,7 +28,7 @@
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#define APP_ID "xmrig"
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#define APP_NAME "XMRig"
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#define APP_DESC "XMRig miner"
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#define APP_VERSION "5.2.1"
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#define APP_VERSION "5.2.1-dev"
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#define APP_DOMAIN "xmrig.com"
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#define APP_SITE "www.xmrig.com"
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#define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
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