XMRig
3986c43fa5
Merge branch 'master' into dev
2020-07-31 16:48:54 +07:00
XMRig
a0fe49f946
v6.3.1
2020-07-31 13:20:56 +07:00
XMRig
70dbe8562c
Merge branch 'dev'
2020-07-31 13:20:11 +07:00
xmrig
41fcd1e49a
Update CHANGELOG.md
2020-07-31 13:16:58 +07:00
xmrig
90195caa1d
Merge pull request #1792 from SChernykh/dev
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Fixed crash in RelWithDbgInfo MSVC build
2020-07-29 15:42:09 +07:00
SChernykh
cdb6287d89
Fixed crash in RelWithDbgInfo MSVC build
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Same problem as in https://github.com/xmrig/xmrig/pull/1784 , fixed with compiler flags this time.
2020-07-29 10:39:58 +02:00
XMRig
32e9b7e34a
Added command line option --pause-on-battery and renamed config option.
2020-07-23 15:45:01 +07:00
XMRig
6484bbb716
Add tags
2020-07-23 10:26:56 +07:00
xmrig
e59806d6ae
Merge pull request #1786 from SChernykh/dev
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Added mining on battery setting
2020-07-23 09:20:06 +07:00
SChernykh
299b180b28
Added mining on battery setting
2020-07-22 20:21:42 +02:00
XMRig
1acd88ed39
Cleanup
2020-07-22 21:27:40 +07:00
XMRig
109c088e8a
Cleanup usage output.
2020-07-22 19:58:08 +07:00
xmrig
bb18239642
Update README.md
2020-07-22 09:14:25 +07:00
xmrig
ccded7cc0a
Merge pull request #1784 from SChernykh/dev
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Fixed RandomX initialization for VS debug builds
2020-07-21 19:04:02 +07:00
SChernykh
5bc89fdc8b
Fixed RandomX initialization for VS debug builds
2020-07-21 10:10:07 +02:00
XMRig
70c7f33a20
Added command line options --cache-qos (--randomx-cache-qos) and --argon2-impl (--cpu-argon2-impl).
2020-07-20 09:17:59 +07:00
XMRig
1ec185a3a0
v6.3.1-dev
2020-07-17 03:13:02 +07:00
XMRig
6aa4eeefbb
Merge branch 'master' into dev
2020-07-17 03:12:36 +07:00
XMRig
10ea567084
v6.3.0
2020-07-17 00:17:55 +07:00
XMRig
028d6503aa
Merge branch 'dev'
2020-07-17 00:17:24 +07:00
XMRig
51346c2b2b
v6.3.0-dev
2020-07-17 00:04:31 +07:00
XMRig
ca535c7813
Sync changes with the proxy.
2020-07-16 23:29:21 +07:00
xmrig
ba80e27349
Merge pull request #1780 from SChernykh/dev
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Cryptonight OpenCL: fix for long input data
2020-07-16 19:56:20 +07:00
SChernykh
bd8cf54a0b
Cryptonight OpenCL: fix for long input data
2020-07-16 10:39:32 +02:00
XMRig
e0eed7d5d6
Fixed build without MSR support.
2020-07-16 05:15:35 +07:00
XMRig
8dff08f15f
Merge branch 'haven-protocol-org-master' into dev
2020-07-15 23:33:53 +07:00
XMRig
47d68b068b
Merge branch 'master' of https://github.com/haven-protocol-org/xmrig into haven-protocol-org-master
2020-07-15 23:33:17 +07:00
Neil Coggins
a648a8b9be
Increased max blob size to support Haven offshore capability
2020-07-14 11:52:43 +01:00
xmrig
7eefccc6bc
Merge pull request #1776 from SChernykh/dev
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Removed cache QoS warning at exit on unsupported CPUs
2020-07-14 01:45:18 +07:00
SChernykh
1bf159d1e8
Removed cache QoS warning at exit on unsupported CPUs
2020-07-13 20:43:49 +02:00
xmrig
bf46cb8684
Merge pull request #1774 from SChernykh/dev
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RandomX: added cache QoS support
2020-07-14 01:35:46 +07:00
SChernykh
72c385c870
Cache QoS: fix for seting MSR
2020-07-13 20:30:44 +02:00
SChernykh
c83429c55c
RandomX: added cache QoS support
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False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
2020-07-13 17:23:18 +02:00
xmrig
e5a2689052
Merge pull request #1771 from jserv/update-sse2neon
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Adopt new SSE2NEON and reduce ARM-specific changes
2020-07-11 02:32:56 +07:00
Jim Huang
b665d2d865
Adopt new SSE2NEON and reduce ARM-specific changes
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This patch updated SSE2NEON [1], which contains more functions
provided by Intel intrinsics, only implemented with NEON-based
counterparts to produce the exact semantics of the intrinsics.
Consequently, ARM-specific changes against CryptoNight_arm can
be reduced as well.
[1] https://github.com/DLTcollab/sse2neon/
2020-07-11 01:55:11 +08:00
XMRig
e06a76ef1c
v6.2.4-dev
2020-07-10 03:12:00 +07:00
XMRig
f523fddbfd
Merge branch 'master' into dev
2020-07-10 02:49:33 +07:00
XMRig
30165ce4be
v6.2.3
2020-07-09 22:24:35 +07:00
XMRig
83a10cce8c
Merge branch 'dev'
2020-07-09 22:24:01 +07:00
xmrig
71cc486553
Update CHANGELOG.md
2020-07-09 22:23:16 +07:00
xmrig
2eaf8edf0e
Merge pull request #1766 from SChernykh/dev
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RandomX: tweaked Ryzen code
2020-07-05 21:16:21 +07:00
SChernykh
3d740e81a2
RandomX: tweaked Ryzen code
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Very small speedup
2020-07-05 16:06:59 +02:00
xmrig
ef475d98da
Update CHANGELOG.md
2020-07-04 19:11:29 +07:00
xmrig
5e92acab34
Merge pull request #1763 from SChernykh/dev
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KawPow: fixed more duplicate share errors
2020-07-04 02:37:03 +07:00
SChernykh
935b8a1106
KawPow: fixed more duplicate share errors
2020-07-03 21:33:44 +02:00
xmrig
c371a7a2bb
Update CHANGELOG.md
2020-07-04 00:29:50 +07:00
XMRig
4fe011b469
Fix tab/space inconsistency.
2020-07-03 21:36:06 +07:00
XMRig
bf32802a82
#1754 Fixed GPU health readings for pre Vega GPUs.
2020-07-03 21:14:21 +07:00
xmrig
ccfbba94f2
Merge pull request #1761 from SChernykh/dev
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Fix typo
2020-07-02 19:41:19 +07:00
SChernykh
70d7fe9b59
Fix typo
2020-07-02 14:29:52 +02:00