Commit graph

376 commits

Author SHA1 Message Date
XMRig
030d6e5962
Update year. 2020-02-01 20:24:00 +07:00
SChernykh
4571899664 Removed MSR mod for Bulldozer
It turned out to be useless: https://www.reddit.com/r/MoneroMining/comments/et7s7w/psa_amd_opteronfxa6a8a10_owners_needed_to_test/
2020-01-27 09:39:39 +01:00
SChernykh
cd763be05b Fix compile error 2020-01-24 14:09:07 +01:00
SChernykh
42a7194e93 Fix crash on Linux 2020-01-24 13:34:12 +01:00
SChernykh
9f1753cc4f Optimized CFROUND 2020-01-22 20:11:00 +01:00
SChernykh
d342968211 Added support for BMI2 instructions 2020-01-21 19:44:56 +01:00
SChernykh
f80177cbd3 Optimizations for AMD Bulldozer
- Added support for XOP instructions
- Enabled Ryzen code for Bulldozer because it's faster there too
2020-01-15 13:04:26 +01:00
SChernykh
665e43fecc MSR preset for Bulldozer CPUs
Also fixed verbose output for MSR presets with masks.
2020-01-14 19:27:34 +01:00
SChernykh
73722ce186 JIT compiler: removed unnecessary memcpy from generateProgram() 2020-01-13 18:00:41 +01:00
SChernykh
869209389e Update MSR preset for Intel
As per https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184
2020-01-09 08:10:36 +01:00
SChernykh
eb20dfbc94 JIT compiler tweaks 2020-01-06 13:57:48 +01:00
XMRig
88ff807700
Fix compile warnings. 2020-01-03 19:11:48 +07:00
SChernykh
c9f90e6770 Refactor Ryzen fix to fix compilation issues 2019-12-31 11:55:07 +02:00
XMRig
a5b0bc04cc
Add "cn/ultra" alias for tlo-pool.raasu.org pool. 2019-12-29 15:36:05 +07:00
XMRig
402c44b547
Added "cn-pico/tlo". 2019-12-29 00:29:19 +07:00
XMRig
ac4086b273
Fix build. 2019-12-28 02:00:08 +07:00
XMRig
f00769f758
Code style cleanup. 2019-12-28 01:45:54 +07:00
SChernykh
3a2941b719 Fix for 1st-gen Ryzen crashes 2019-12-27 12:40:38 +02:00
XMRig
dbb721cb5e
Removed "rx/v" algorithm. 2019-12-26 22:34:19 +07:00
XMRig
22eca8e0d5
Fixed memory allocation checks. 2019-12-25 04:39:21 +07:00
XMRig
449617d717
Allow use old CUDA plugin. 2019-12-20 21:10:13 +07:00
XMRig
049caabdae
Add missing algorithm name alias. 2019-12-20 04:08:47 +07:00
XMRig
2911bb3a81
Fix OpenCL. 2019-12-20 04:05:09 +07:00
Tony Butler
45412a2ace Add MoneroV (rx/v) algorithm [based on MoneroOcean/master] 2019-12-18 16:17:22 -07:00
XMRig
f4cedd7b63
Fixed MsrItem serialization. 2019-12-19 03:49:32 +07:00
XMRig
3e3d34b3ce
Allow number value for "wrmsr" option only for Intel. 2019-12-19 03:28:05 +07:00
XMRig
12fb27e2cf
Use MsrItem::kNoMask. 2019-12-19 03:20:48 +07:00
SChernykh
c01c035269 Fixed crash with GCC compiler 2019-12-18 17:32:57 +01:00
SChernykh
f85aba5d21 Fixed AVX detection 2019-12-18 12:20:21 +01:00
SChernykh
f8bf8fddd9 Update jit_compiler_x86_static.S 2019-12-18 09:13:21 +01:00
SChernykh
7459677fd5 Add vzeroupper for processors with AVX
To avoid false dependencies on upper 128 bits of YMM registers.
2019-12-18 09:12:25 +01:00
SChernykh
59e8fdb9ed Added bit masks for MSR registers 2019-12-17 23:55:22 +01:00
XMRig
5142a406b0
Less error prone log interface. 2019-12-18 02:20:31 +07:00
XMRig
f8865b1498
Added "verbose" option. 2019-12-17 21:46:11 +07:00
XMRig
969821296f
Merge branch 'feature-custom-msr' into dev 2019-12-17 16:53:28 +07:00
XMRig
a877b1d269
Added save/restore MSR registers on Linux. 2019-12-17 16:17:11 +07:00
XMRig
9cea70b77c
Rename Rx_windows.cpp to Rx_win.cpp. 2019-12-17 15:16:37 +07:00
XMRig
d2d501c821
Added RandomX option "rdmsr" and save/restore MSR registers on Windows. 2019-12-17 14:45:01 +07:00
XMRig
8bef964f68
Added support for write custom MSR. 2019-12-17 02:27:07 +07:00
SChernykh
4da37baf8c RandomSFX (Safex Cash variant) support 2019-12-16 19:36:29 +01:00
XMRig
1d4c8dda96
#1423 Implemented driver reuse. 2019-12-16 03:41:58 +07:00
XMRig
b633b593ad
Strict wrmsr error handling. 2019-12-16 02:45:07 +07:00
XMRig
8dbb83f99b
Revert changes. 2019-12-16 02:17:57 +07:00
SChernykh
2e001677df Use unique service name for WinRing0 driver
To avoid error 1072
2019-12-15 19:28:14 +01:00
XMRig
6adba6dad4
Removed unnecessary check. 2019-12-15 12:02:45 +07:00
XMRig
fb5b873524
Added missing tag. 2019-12-15 01:52:20 +07:00
XMRig
5d0fd2dc8e
Unified Linux/Windows MSR log messages. 2019-12-15 01:32:41 +07:00
SChernykh
222fcfae87 Fixed thread count for MSR mod 2019-12-14 16:30:46 +01:00
SChernykh
2e6523aa10 MSR mod for Windows 2019-12-14 16:04:37 +01:00
XMRig
7ff465053b
Added additional MSR registers for Ryzen CPUs. 2019-12-12 14:21:15 +07:00