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https://github.com/hinto-janai/cuprate.git
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random-x: add dataset/ cache
This commit is contained in:
parent
f9c2794af2
commit
545189f523
8 changed files with 158 additions and 31 deletions
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@ -6,6 +6,7 @@ edition = "2021"
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[features]
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default = ["jit"]
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jit = ["dep:dynasmrt"]
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rayon = ["dep:rayon"]
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[dependencies]
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blake2 = "0.10"
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@ -15,5 +16,7 @@ hex-literal = "0.4"
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dynasmrt = {version = "2.0.0", optional = true}
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rayon = {version ="1.7", optional = true}
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[profile.dev]
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opt-level = 2
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opt-level = 3
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@ -1,17 +1,20 @@
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use argon2::{Algorithm, Argon2, Block, Params, Version};
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use std::sync::{Arc, RwLock};
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use argon2::{Algorithm, Argon2, Block, Params, Version};
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#[cfg(feature = "rayon")]
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use rayon::prelude::*;
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use crate::blake2_generator::Blake2Generator;
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use crate::{
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config::{
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RANDOMX_ARGON_ITERATIONS, RANDOMX_ARGON_LANES, RANDOMX_ARGON_MEMORY, RANDOMX_ARGON_SALT,
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RANDOMX_CACHE_ACCESSES,
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RANDOMX_CACHE_ACCESSES, RANDOMX_DATASET_SIZE,
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},
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registers::{RGroupRegisterID, RGroupRegisters},
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superscalar::SSProgram,
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};
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trait Dataset {}
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/// Generates the memory blocks used in the cache
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fn argon2_blocks(key: &[u8]) -> Box<[Block]> {
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let params = Params::new(
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RANDOMX_ARGON_MEMORY,
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@ -35,6 +38,31 @@ fn argon2_blocks(key: &[u8]) -> Box<[Block]> {
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blocks
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}
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/// The Cache.
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///
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/// The cache is used during light verification.
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/// Internally this struct is a wrapper around an [`Arc`] internal cache, this allows
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/// cheep clones and allows the cache to be shared between VMs on different threads.
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#[derive(Debug, Clone)]
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pub struct Cache {
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internal_cache: Arc<RwLock<InternalCache>>,
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}
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impl Cache {
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/// Initialises the cache with the provided key.
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///
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/// The key must be between 1-60 bytes (inclusive) otherwise this will panic.
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pub fn init(key: &[u8]) -> Self {
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let internal_cache = InternalCache::init(key);
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Cache {
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internal_cache: Arc::new(RwLock::new(internal_cache)),
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}
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}
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}
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/// The internal cache structure, used during light verification.
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#[derive(Debug)]
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struct InternalCache {
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memory_blocks: Box<[Block]>,
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programs: Vec<SSProgram>,
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@ -55,32 +83,111 @@ impl InternalCache {
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programs,
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}
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}
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/// Gets an item from the cache at the specified index.
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fn get_item(&self, idx: usize) -> [u64; 8] {
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// one item is 8 u64s
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// mask = (blocks in cache * bytes in a block / size of item) minus one.
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let mask = (self.memory_blocks.len() * 1024 / 64) - 1;
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// and the idx with the mask this is the same as doing mod (self.memory_blocks.len() * 1024 / 64)
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let idx = idx & mask;
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// block_idx = idx divided by amount of items in a block
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let block_idx = idx / (1024 / 64);
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// idx * 8 is to get the idx of a single u64
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// we mask with amount of u64s in a block minus 1 which is the same as doing
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// mod the amount of instructions in a block.
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let block_u64_start = (idx * 8) & 127;
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// The plus 8 cannot overflow as (idx * 8) & 127 wont give a number bigger than 120
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return self.memory_blocks[block_idx].as_ref()[block_u64_start..block_u64_start + 8]
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.try_into()
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.unwrap();
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}
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/// Generates the dataset item at the specified index.
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fn init_data_set_item(&self, item_number: usize) -> [u64; 8] {
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let mut registers = RGroupRegisters::default();
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registers.set(
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&RGroupRegisterID::R0,
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(TryInto::<u64>::try_into(item_number).unwrap() + 1_u64)
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.wrapping_mul(6364136223846793005_u64),
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);
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let mut init_reg = |dst, val: u64| {
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registers.apply_to_dst_with_src(&dst, &RGroupRegisterID::R0, |_, src| src ^ val)
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};
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init_reg(RGroupRegisterID::R1, 9298411001130361340);
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init_reg(RGroupRegisterID::R2, 12065312585734608966);
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init_reg(RGroupRegisterID::R3, 9306329213124626780);
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init_reg(RGroupRegisterID::R4, 5281919268842080866);
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init_reg(RGroupRegisterID::R5, 10536153434571861004);
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init_reg(RGroupRegisterID::R6, 3398623926847679864);
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init_reg(RGroupRegisterID::R7, 9549104520008361294);
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let mut cache_index = item_number;
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for program in &self.programs {
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program.execute(&mut registers);
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let cache_item = self.get_item(cache_index);
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for (reg_id, item) in RGroupRegisterID::iter().zip(cache_item) {
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registers.apply_to_dst(®_id, |dst| dst ^ item);
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}
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cache_index = registers
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.get(&program.reg_with_max_latency())
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.try_into()
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.expect("u64 does not fit into usize");
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}
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registers.inner()
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}
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}
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pub struct Cache {
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internal_cache: Arc<RwLock<InternalCache>>,
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/// The Dataset used during mining.
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///
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/// Internally this struct is a wrapper around an [`Arc`] internal dataset, this allows
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/// cheep clones and allows the dataset to be shared between VMs on different threads.
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#[derive(Debug, Clone)]
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pub struct Dataset {
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internal_dataset: Arc<RwLock<InternalDataset>>,
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}
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impl Dataset {
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/// Initialises the dataset with the provided key.
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///
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/// The key must be between 1-60 bytes (inclusive) otherwise this will panic.
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///
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/// This is very computationally intense so might take a long time to complete.
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pub fn init(key: &[u8]) -> Dataset {
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let internal_dataset = InternalDataset::init(key);
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Dataset {
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internal_dataset: Arc::new(RwLock::new(internal_dataset)),
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}
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}
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}
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/// The internal dataset used during mining.
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#[derive(Debug)]
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struct InternalDataset {
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dataset: Vec<u64>,
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dataset: Vec<[u64; 8]>,
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}
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impl InternalDataset {
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fn init(key: &[u8]) -> InternalDataset {
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let cache = InternalCache::init(key);
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let
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#[cfg(feature = "rayon")]
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let dataset: Vec<[u64; 8]> = (0..RANDOMX_DATASET_SIZE / (64 * 8))
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.into_par_iter()
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.map(|i| cache.init_data_set_item(i))
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.collect();
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#[cfg(not(feature = "rayon"))]
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let dataset: Vec<[u64; 8]> = (0..RANDOMX_DATASET_SIZE / (64 * 8))
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.map(|i| cache.init_data_set_item(i))
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.collect();
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Self { dataset }
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}
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}
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fn init_data_set_item(cache: &InternalCache, item: u64) -> [u64; 8] {
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let
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}
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// 12118971377224777581
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#[test]
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fn init() {
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let mem = InternalCache::init(&[5]);
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println!("{:?}", mem.memory_blocks[1000])
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}
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@ -1,10 +1,12 @@
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mod aes_hash;
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mod blake2_generator;
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mod config;
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//mod dataset;
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mod dataset;
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mod registers;
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mod superscalar;
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pub use dataset::{Cache, Dataset};
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fn is_0_or_power_of_2(x: u64) -> bool {
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(x & (x - 1)) == 0
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}
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@ -31,6 +31,10 @@ impl RGroupRegisterID {
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pub struct RGroupRegisters([u64; 8]);
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impl RGroupRegisters {
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pub fn inner(self) -> [u64; 8] {
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self.0
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}
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pub fn apply_to_dst(&mut self, dst: &RGroupRegisterID, f: impl FnOnce(u64) -> u64) {
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*self.get_mut(dst) = f(self.get(dst));
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}
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@ -2,13 +2,16 @@ mod cpu;
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mod executor;
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mod generator;
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mod instructions;
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mod program;
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use crate::blake2_generator::Blake2Generator;
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use crate::registers::RGroupRegisterID;
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use crate::registers::{RGroupRegisterID, RGroupRegisters};
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use executor::execute;
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use generator::generate;
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use instructions::ScalarInstruction;
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#[derive(Debug)]
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pub(crate) struct SSProgram {
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program: Vec<ScalarInstruction>,
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reg_with_max_latency: RGroupRegisterID,
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@ -18,4 +21,12 @@ impl SSProgram {
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pub fn generate(gen: &mut Blake2Generator) -> Self {
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generate(gen)
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}
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pub fn execute(&self, registers: &mut RGroupRegisters) {
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execute(&self.program, registers)
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}
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pub fn reg_with_max_latency(&self) -> RGroupRegisterID {
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self.reg_with_max_latency
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}
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}
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@ -37,6 +37,7 @@ impl AllowedPorts {
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}
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}
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#[allow(non_camel_case_types)]
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pub enum MacroOp {
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SUB_RR,
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XOR_RR,
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@ -2,7 +2,7 @@ use std::cmp::Ordering;
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use crate::config::SUPERSCALAR_MAX_SIZE;
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use crate::registers::{RGroupRegisterID, RGroupRegisters};
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use crate::superscalar::cpu::{MacroOp, ProgramSchedule, SlotLen};
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use crate::superscalar::cpu::{ProgramSchedule, SlotLen};
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use crate::superscalar::instructions::ScalarInstruction;
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use crate::superscalar::SSProgram;
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use crate::{
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@ -497,7 +497,7 @@ enum ScalarInstructionBuilderSM {
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macro_op_idx: usize,
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},
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/// NULL state, this state will only be finished on is the program is full.
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NULL,
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Null,
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}
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impl ScalarInstructionBuilderSM {
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@ -510,8 +510,8 @@ impl ScalarInstructionBuilderSM {
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program_state: &mut ProgramState,
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) {
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loop {
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match std::mem::replace(self, ScalarInstructionBuilderSM::NULL) {
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ScalarInstructionBuilderSM::NULL => {
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match std::mem::replace(self, ScalarInstructionBuilderSM::Null) {
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ScalarInstructionBuilderSM::Null => {
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return;
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}
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ScalarInstructionBuilderSM::Generate { .. } => {
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@ -682,8 +682,7 @@ impl ScalarInstructionBuilderSM {
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let mut set = false;
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for _ in 0..LOOK_FORWARD_CYCLES {
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if !builder.select_destination(gen, *scheduled_cycle, allow_chain_mul, ®isters_info)
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{
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if !builder.select_destination(gen, *scheduled_cycle, allow_chain_mul, registers_info) {
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*scheduled_cycle += 1;
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*cycle += 1;
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} else {
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@ -731,7 +730,7 @@ impl ScalarInstructionBuilderSM {
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match self {
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ScalarInstructionBuilderSM::Generate { last_instruction } => *last_instruction,
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ScalarInstructionBuilderSM::PartiallyComplete { builder, .. } => Some(builder.id),
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ScalarInstructionBuilderSM::NULL => {
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ScalarInstructionBuilderSM::Null => {
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panic!("Should not be calling this function in this state")
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}
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}
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@ -1,5 +1,5 @@
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use crate::registers::RGroupRegisterID;
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use crate::superscalar::cpu::{MacroOp, SlotLen};
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use crate::superscalar::cpu::MacroOp;
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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#[allow(non_camel_case_types)]
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