20 commits

Author	SHA1	Message	Date
XMRig	0041e9f0c1	Add new algorithms for ARM.	2018-07-10 00:29:16 +07:00
XMRig	6a7a7ada2e	Fix ARM build.	2018-06-11 15:44:45 +07:00
XMRig	dab4239aca	Added support for cn-heavy/xhv.	2018-06-11 12:00:59 +07:00
XMRig	1748a7bd57	Fix double hash mode too.	2018-06-03 05:42:10 +07:00
XMRig	6cf24936df	#551 Fixed cn-heavy for ARMv8.	2018-06-03 02:56:49 +07:00
XMRig	26ee5028e1	Use native checks instead of XMRIG_ARMv8.	2018-06-03 00:09:59 +07:00
XMRig	a00024cf51	Fixed ARMv8 build.	2018-05-05 22:44:20 +07:00
XMRig	14576f599c	Fix ARMv7 build.	2018-04-19 19:44:17 +07:00
XMRig	ad94e9a7d2	Simplify ARM implementation.	2018-04-19 11:54:11 +07:00
XMRig	6b4f2d0a91	Fixed ARM build.	2018-04-15 12:58:17 +07:00
XMRig	9125b6c251	Rewrite memory allocation.	2018-04-15 11:08:47 +07:00
XMRig	4e8ef7c6ed	Added cryptonight-heavy support for ARM	2018-04-03 17:51:06 +07:00
XMRig	2de5d92d3a	Removed unnecessary pointers cast.	2018-03-18 05:48:19 +07:00
XMRig	aec31c43c0	Better v1 PoW implementation, added variant option.	2018-03-12 22:29:44 +07:00
XMRig	79779b51da	Added reference hashes.	2018-03-07 15:32:44 +07:00
XMRig	df6a397e52	Update copyright and move version into Job class.	2018-03-06 17:06:07 +07:00
Lee Clagett	48b1de0b59	Changes for the Monero v1 PoW	2018-03-02 22:17:29 +00:00
XMRig	184f79ad3f	Fix code style, replace tabs to space #2.	2018-02-08 17:21:12 +07:00
Foudge	9a28ad590c	up to 20% perf increase with Cryptonight with non-AES CPU ... This time, the performance increase is got with MSVC and GCC. On non-AES CPU, there were an useless load/store SSE2 register. The last MSVC "hack" is replaced by a portable code and he's more complete (a load is saved). On my C2Q6600, with 3 thread, I have +16% with MSVC2015 and +20% with GCC 7.3, compared to official 2.4.4 version.	2018-01-28 12:58:19 +01:00
XMRig	aa4f8b6fa7	#216 Added ARMv7 support.	2017-11-26 22:23:23 +03:00

Renamed from src/crypto/CryptoNight_arm64.h (Browse further)