Commit graph

1299 commits

Author SHA1 Message Date
XMRig
638ed7b4f2
v5.5.2-dev 2020-01-12 12:55:50 +07:00
XMRig
9ae8907b3e
v5.5.1 2020-01-12 08:34:01 +07:00
xmrig
0290b1ed3c
Merge pull request #1493 from SChernykh/dev
Update MSR preset for Intel
2020-01-09 14:24:11 +07:00
SChernykh
869209389e Update MSR preset for Intel
As per https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184
2020-01-09 08:10:36 +01:00
XMRig
c6530e352f
Code cleanup. 2020-01-07 10:13:01 +07:00
SChernykh
eb20dfbc94 JIT compiler tweaks 2020-01-06 13:57:48 +01:00
XMRig
88ff807700
Fix compile warnings. 2020-01-03 19:11:48 +07:00
XMRig
e76e75cdff
Merge branch 'dev' of github.com:xmrig/xmrig into dev 2020-01-03 05:36:47 +07:00
XMRig
083c61754b
Fixed unwanted resume after dataset change. 2020-01-03 05:36:22 +07:00
SChernykh
c9f90e6770 Refactor Ryzen fix to fix compilation issues 2019-12-31 11:55:07 +02:00
SChernykh
29dd2c2138 Cleanup 2019-12-30 20:55:03 +02:00
SChernykh
4e5aef0a8a Auto-config for mobile Ryzen APUs 2019-12-30 20:53:21 +02:00
XMRig
039c42b1fe
v5.5.1-dev 2019-12-30 16:05:51 +07:00
XMRig
d64bbfa9c0
#1469 Fixed build with gcc 4.8. 2019-12-30 16:04:07 +07:00
XMRig
d5605a29b4
v5.5.0 2019-12-29 21:42:11 +07:00
XMRig
a5b0bc04cc
Add "cn/ultra" alias for tlo-pool.raasu.org pool. 2019-12-29 15:36:05 +07:00
XMRig
402c44b547
Added "cn-pico/tlo". 2019-12-29 00:29:19 +07:00
XMRig
ac4086b273
Fix build. 2019-12-28 02:00:08 +07:00
XMRig
f00769f758
Code style cleanup. 2019-12-28 01:45:54 +07:00
SChernykh
3a2941b719 Fix for 1st-gen Ryzen crashes 2019-12-27 12:40:38 +02:00
XMRig
4a9a7434f6
Revert Platform::setProcessPriority 2019-12-27 03:19:03 +07:00
XMRig
dbb721cb5e
Removed "rx/v" algorithm. 2019-12-26 22:34:19 +07:00
XMRig
7dfb4d9dc0
v5.5.0-dev 2019-12-25 04:53:38 +07:00
XMRig
22eca8e0d5
Fixed memory allocation checks. 2019-12-25 04:39:21 +07:00
XMRig
ecb46643e2
Added support for alternative CUDA plugin API. 2019-12-25 00:35:43 +07:00
XMRig
2e4a83547d
Add console title for Windows. 2019-12-24 02:04:34 +07:00
XMRig
ea7aa4ccef
Fixed MSVC build. 2019-12-23 00:37:43 +07:00
XMRig
f9d07229b4
Add extra variables. 2019-12-23 00:28:57 +07:00
XMRig
2d15c10e0f
Added ENV support for "loader" option. 2019-12-22 19:48:33 +07:00
XMRig
5bd6a1c028
Added ENV support for "user", "pass" and "rig-id" fields. 2019-12-22 19:09:30 +07:00
XMRig
356e666e61
Added Env class. 2019-12-22 18:09:26 +07:00
XMRig
bdf12bca0f
Make Process::location static. 2019-12-22 13:26:06 +07:00
XMRig
c44ae06d54
Added --randomx-no-rdmsr command line option. 2019-12-21 23:57:25 +07:00
XMRig
c7de9e6561
v5.4.1-dev 2019-12-21 23:42:18 +07:00
XMRig
8f2a92c3ec
v5.4.0 2019-12-21 16:12:02 +07:00
XMRig
98cfe7ed37
Added extra error message. 2019-12-20 23:44:32 +07:00
XMRig
449617d717
Allow use old CUDA plugin. 2019-12-20 21:10:13 +07:00
XMRig
049caabdae
Add missing algorithm name alias. 2019-12-20 04:08:47 +07:00
XMRig
2911bb3a81
Fix OpenCL. 2019-12-20 04:05:09 +07:00
Tony Butler
45412a2ace Add MoneroV (rx/v) algorithm [based on MoneroOcean/master] 2019-12-18 16:17:22 -07:00
XMRig
f4cedd7b63
Fixed MsrItem serialization. 2019-12-19 03:49:32 +07:00
XMRig
3e3d34b3ce
Allow number value for "wrmsr" option only for Intel. 2019-12-19 03:28:05 +07:00
XMRig
12fb27e2cf
Use MsrItem::kNoMask. 2019-12-19 03:20:48 +07:00
SChernykh
c01c035269 Fixed crash with GCC compiler 2019-12-18 17:32:57 +01:00
SChernykh
f85aba5d21 Fixed AVX detection 2019-12-18 12:20:21 +01:00
SChernykh
f8bf8fddd9 Update jit_compiler_x86_static.S 2019-12-18 09:13:21 +01:00
SChernykh
7459677fd5 Add vzeroupper for processors with AVX
To avoid false dependencies on upper 128 bits of YMM registers.
2019-12-18 09:12:25 +01:00
SChernykh
59e8fdb9ed Added bit masks for MSR registers 2019-12-17 23:55:22 +01:00
XMRig
5142a406b0
Less error prone log interface. 2019-12-18 02:20:31 +07:00
XMRig
3cc8b19ca0
Added command line option --verbose. 2019-12-17 22:03:50 +07:00