Merge branch 'master' into dev

This commit is contained in:
XMRig 2019-01-17 20:41:52 +07:00
commit b15e605614
11 changed files with 39 additions and 72 deletions

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@ -1,3 +1,13 @@
# v2.9.3
- [#909](https://github.com/xmrig/xmrig/issues/909) Fixed compile errors on FreeBSD.
- [#912](https://github.com/xmrig/xmrig/pull/912) Fixed, C++ implementation of `cn/half` was produce up to 13% of invalid hashes.
# v2.9.2
- [#907](https://github.com/xmrig/xmrig/pull/907) Fixed crash on Linux.
# v2.9.1
- Restored compatibility with https://stellite.hashvault.pro.
# v2.9.0 # v2.9.0
- [#899](https://github.com/xmrig/xmrig/issues/899) Added support for new algorithm `cn/half` for Masari and Stellite forks. - [#899](https://github.com/xmrig/xmrig/issues/899) Added support for new algorithm `cn/half` for Masari and Stellite forks.
- [#834](https://github.com/xmrig/xmrig/pull/834) Added ASM optimized code for AMD Bulldozer. - [#834](https://github.com/xmrig/xmrig/pull/834) Added ASM optimized code for AMD Bulldozer.

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@ -158,7 +158,7 @@ else()
) )
if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
set(EXTRA_LIBS kvm) set(EXTRA_LIBS kvm pthread)
else() else()
set(EXTRA_LIBS pthread rt dl) set(EXTRA_LIBS pthread rt dl)
endif() endif()

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@ -102,5 +102,7 @@ void *Mem::allocateExecutableMemory(size_t size)
void Mem::flushInstructionCache(void *p, size_t size) void Mem::flushInstructionCache(void *p, size_t size)
{ {
# ifndef __FreeBSD__
__builtin___clear_cache(reinterpret_cast<char*>(p), reinterpret_cast<char*>(p) + size); __builtin___clear_cache(reinterpret_cast<char*>(p), reinterpret_cast<char*>(p) + size);
# endif
} }

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@ -342,7 +342,8 @@ bool Client::parseJob(const rapidjson::Value &params, int *code)
if (params.HasMember("algo")) { if (params.HasMember("algo")) {
job.setAlgorithm(params["algo"].GetString()); job.setAlgorithm(params["algo"].GetString());
} }
else if (params.HasMember("variant")) {
if (params.HasMember("variant")) {
const rapidjson::Value &variant = params["variant"]; const rapidjson::Value &variant = params["variant"];
if (variant.IsInt()) { if (variant.IsInt()) {

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@ -66,9 +66,9 @@
__m128i sqrt_result_xmm_##part = _mm_cvtsi64_si128(h##part[13]); __m128i sqrt_result_xmm_##part = _mm_cvtsi64_si128(h##part[13]);
#ifdef _MSC_VER #ifdef _MSC_VER
# define VARIANT2_SET_ROUNDING_MODE() if (VARIANT == xmrig::VARIANT_2) { _control87(RC_DOWN, MCW_RC); } # define VARIANT2_SET_ROUNDING_MODE() if (BASE == xmrig::VARIANT_2) { _control87(RC_DOWN, MCW_RC); }
#else #else
# define VARIANT2_SET_ROUNDING_MODE() if (VARIANT == xmrig::VARIANT_2) { fesetround(FE_DOWNWARD); } # define VARIANT2_SET_ROUNDING_MODE() if (BASE == xmrig::VARIANT_2) { fesetround(FE_DOWNWARD); }
#endif #endif
# define VARIANT2_INTEGER_MATH(part, cl, cx) \ # define VARIANT2_INTEGER_MATH(part, cl, cx) \

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@ -23,10 +23,7 @@ FN_PREFIX(cnv2_mainloop_ivybridge_asm):
#include "cn2/cnv2_main_loop_ivybridge.inc" #include "cn2/cnv2_main_loop_ivybridge.inc"
add rsp, 48 add rsp, 48
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
FN_PREFIX(cnv2_mainloop_ryzen_asm): FN_PREFIX(cnv2_mainloop_ryzen_asm):
@ -35,10 +32,7 @@ FN_PREFIX(cnv2_mainloop_ryzen_asm):
#include "cn2/cnv2_main_loop_ryzen.inc" #include "cn2/cnv2_main_loop_ryzen.inc"
add rsp, 48 add rsp, 48
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
FN_PREFIX(cnv2_mainloop_bulldozer_asm): FN_PREFIX(cnv2_mainloop_bulldozer_asm):
@ -47,10 +41,7 @@ FN_PREFIX(cnv2_mainloop_bulldozer_asm):
#include "cn2/cnv2_main_loop_bulldozer.inc" #include "cn2/cnv2_main_loop_bulldozer.inc"
add rsp, 48 add rsp, 48
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
FN_PREFIX(cnv2_double_mainloop_sandybridge_asm): FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
@ -60,7 +51,4 @@ FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
#include "cn2/cnv2_double_main_loop_sandybridge.inc" #include "cn2/cnv2_double_main_loop_sandybridge.inc"
add rsp, 48 add rsp, 48
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop

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@ -8,40 +8,28 @@ ALIGN(64)
cnv2_mainloop_ivybridge_asm PROC cnv2_mainloop_ivybridge_asm PROC
INCLUDE cn2/cnv2_main_loop_ivybridge.inc INCLUDE cn2/cnv2_main_loop_ivybridge.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_ivybridge_asm ENDP cnv2_mainloop_ivybridge_asm ENDP
ALIGN(64) ALIGN(64)
cnv2_mainloop_ryzen_asm PROC cnv2_mainloop_ryzen_asm PROC
INCLUDE cn2/cnv2_main_loop_ryzen.inc INCLUDE cn2/cnv2_main_loop_ryzen.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_ryzen_asm ENDP cnv2_mainloop_ryzen_asm ENDP
ALIGN(64) ALIGN(64)
cnv2_mainloop_bulldozer_asm PROC cnv2_mainloop_bulldozer_asm PROC
INCLUDE cn2/cnv2_main_loop_bulldozer.inc INCLUDE cn2/cnv2_main_loop_bulldozer.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_bulldozer_asm ENDP cnv2_mainloop_bulldozer_asm ENDP
ALIGN(64) ALIGN(64)
cnv2_double_mainloop_sandybridge_asm PROC cnv2_double_mainloop_sandybridge_asm PROC
INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_double_mainloop_sandybridge_asm ENDP cnv2_double_mainloop_sandybridge_asm ENDP
_TEXT_CNV2_MAINLOOP ENDS _TEXT_CNV2_MAINLOOP ENDS

View file

@ -10,34 +10,22 @@ ALIGN(64)
cnv2_mainloop_ivybridge_asm: cnv2_mainloop_ivybridge_asm:
#include "../cn2/cnv2_main_loop_ivybridge.inc" #include "../cn2/cnv2_main_loop_ivybridge.inc"
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
cnv2_mainloop_ryzen_asm: cnv2_mainloop_ryzen_asm:
#include "../cn2/cnv2_main_loop_ryzen.inc" #include "../cn2/cnv2_main_loop_ryzen.inc"
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
cnv2_mainloop_bulldozer_asm: cnv2_mainloop_bulldozer_asm:
#include "../cn2/cnv2_main_loop_bulldozer.inc" #include "../cn2/cnv2_main_loop_bulldozer.inc"
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
ALIGN(64) ALIGN(64)
cnv2_double_mainloop_sandybridge_asm: cnv2_double_mainloop_sandybridge_asm:
#include "../cn2/cnv2_double_main_loop_sandybridge.inc" #include "../cn2/cnv2_double_main_loop_sandybridge.inc"
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop

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@ -8,40 +8,28 @@ ALIGN 64
cnv2_mainloop_ivybridge_asm PROC cnv2_mainloop_ivybridge_asm PROC
INCLUDE cn2/cnv2_main_loop_ivybridge.inc INCLUDE cn2/cnv2_main_loop_ivybridge.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_ivybridge_asm ENDP cnv2_mainloop_ivybridge_asm ENDP
ALIGN 64 ALIGN 64
cnv2_mainloop_ryzen_asm PROC cnv2_mainloop_ryzen_asm PROC
INCLUDE cn2/cnv2_main_loop_ryzen.inc INCLUDE cn2/cnv2_main_loop_ryzen.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_ryzen_asm ENDP cnv2_mainloop_ryzen_asm ENDP
ALIGN 64 ALIGN 64
cnv2_mainloop_bulldozer_asm PROC cnv2_mainloop_bulldozer_asm PROC
INCLUDE cn2/cnv2_main_loop_bulldozer.inc INCLUDE cn2/cnv2_main_loop_bulldozer.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_mainloop_bulldozer_asm ENDP cnv2_mainloop_bulldozer_asm ENDP
ALIGN 64 ALIGN 64
cnv2_double_mainloop_sandybridge_asm PROC cnv2_double_mainloop_sandybridge_asm PROC
INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
ret 0 ret 0
nop mov eax, 3735929054
nop
nop
nop
cnv2_double_mainloop_sandybridge_asm ENDP cnv2_double_mainloop_sandybridge_asm ENDP
_TEXT_CNV2_MAINLOOP ENDS _TEXT_CNV2_MAINLOOP ENDS

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@ -5,6 +5,7 @@
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet> * Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
* Copyright 2016 Jay D Dee <jayddee246@gmail.com> * Copyright 2016 Jay D Dee <jayddee246@gmail.com>
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt> * Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright 2018-2019 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com> * Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
@ -27,15 +28,15 @@
#define APP_ID "xmrig" #define APP_ID "xmrig"
#define APP_NAME "XMRig" #define APP_NAME "XMRig"
#define APP_DESC "XMRig CPU miner" #define APP_DESC "XMRig CPU miner"
#define APP_VERSION "2.8.5-dev" #define APP_VERSION "2.9.3"
#define APP_DOMAIN "xmrig.com" #define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com" #define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
#define APP_KIND "cpu" #define APP_KIND "cpu"
#define APP_VER_MAJOR 2 #define APP_VER_MAJOR 2
#define APP_VER_MINOR 8 #define APP_VER_MINOR 9
#define APP_VER_PATCH 5 #define APP_VER_PATCH 3
#ifdef _MSC_VER #ifdef _MSC_VER
# if (_MSC_VER >= 1910) # if (_MSC_VER >= 1910)

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@ -69,9 +69,10 @@ static void patchCode(T dst, U src, const uint32_t iterations, const uint32_t ma
# endif # endif
size_t size = 0; size_t size = 0;
while (*(uint32_t*)(p + size) != 0x90909090) { while (*(uint32_t*)(p + size) != 0xDEADC0DE) {
++size; ++size;
} }
size += sizeof(uint32_t);
memcpy((void*) dst, (const void*) src, size); memcpy((void*) dst, (const void*) src, size);