mirror of
https://github.com/xmrig/xmrig.git
synced 2024-11-06 00:17:39 +00:00
Merge branch 'master' into dev
This commit is contained in:
commit
b15e605614
11 changed files with 39 additions and 72 deletions
10
CHANGELOG.md
10
CHANGELOG.md
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@ -1,3 +1,13 @@
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# v2.9.3
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- [#909](https://github.com/xmrig/xmrig/issues/909) Fixed compile errors on FreeBSD.
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- [#912](https://github.com/xmrig/xmrig/pull/912) Fixed, C++ implementation of `cn/half` was produce up to 13% of invalid hashes.
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# v2.9.2
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- [#907](https://github.com/xmrig/xmrig/pull/907) Fixed crash on Linux.
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# v2.9.1
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- Restored compatibility with https://stellite.hashvault.pro.
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# v2.9.0
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# v2.9.0
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- [#899](https://github.com/xmrig/xmrig/issues/899) Added support for new algorithm `cn/half` for Masari and Stellite forks.
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- [#899](https://github.com/xmrig/xmrig/issues/899) Added support for new algorithm `cn/half` for Masari and Stellite forks.
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- [#834](https://github.com/xmrig/xmrig/pull/834) Added ASM optimized code for AMD Bulldozer.
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- [#834](https://github.com/xmrig/xmrig/pull/834) Added ASM optimized code for AMD Bulldozer.
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@ -158,7 +158,7 @@ else()
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)
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)
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if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
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if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
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set(EXTRA_LIBS kvm)
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set(EXTRA_LIBS kvm pthread)
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else()
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else()
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set(EXTRA_LIBS pthread rt dl)
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set(EXTRA_LIBS pthread rt dl)
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endif()
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endif()
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@ -102,5 +102,7 @@ void *Mem::allocateExecutableMemory(size_t size)
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void Mem::flushInstructionCache(void *p, size_t size)
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void Mem::flushInstructionCache(void *p, size_t size)
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{
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{
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# ifndef __FreeBSD__
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__builtin___clear_cache(reinterpret_cast<char*>(p), reinterpret_cast<char*>(p) + size);
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__builtin___clear_cache(reinterpret_cast<char*>(p), reinterpret_cast<char*>(p) + size);
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# endif
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}
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}
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@ -342,7 +342,8 @@ bool Client::parseJob(const rapidjson::Value ¶ms, int *code)
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if (params.HasMember("algo")) {
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if (params.HasMember("algo")) {
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job.setAlgorithm(params["algo"].GetString());
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job.setAlgorithm(params["algo"].GetString());
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}
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}
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else if (params.HasMember("variant")) {
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if (params.HasMember("variant")) {
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const rapidjson::Value &variant = params["variant"];
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const rapidjson::Value &variant = params["variant"];
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if (variant.IsInt()) {
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if (variant.IsInt()) {
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@ -66,9 +66,9 @@
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__m128i sqrt_result_xmm_##part = _mm_cvtsi64_si128(h##part[13]);
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__m128i sqrt_result_xmm_##part = _mm_cvtsi64_si128(h##part[13]);
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#ifdef _MSC_VER
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#ifdef _MSC_VER
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# define VARIANT2_SET_ROUNDING_MODE() if (VARIANT == xmrig::VARIANT_2) { _control87(RC_DOWN, MCW_RC); }
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# define VARIANT2_SET_ROUNDING_MODE() if (BASE == xmrig::VARIANT_2) { _control87(RC_DOWN, MCW_RC); }
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#else
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#else
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# define VARIANT2_SET_ROUNDING_MODE() if (VARIANT == xmrig::VARIANT_2) { fesetround(FE_DOWNWARD); }
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# define VARIANT2_SET_ROUNDING_MODE() if (BASE == xmrig::VARIANT_2) { fesetround(FE_DOWNWARD); }
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#endif
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#endif
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# define VARIANT2_INTEGER_MATH(part, cl, cx) \
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# define VARIANT2_INTEGER_MATH(part, cl, cx) \
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@ -23,10 +23,7 @@ FN_PREFIX(cnv2_mainloop_ivybridge_asm):
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#include "cn2/cnv2_main_loop_ivybridge.inc"
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#include "cn2/cnv2_main_loop_ivybridge.inc"
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add rsp, 48
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add rsp, 48
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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FN_PREFIX(cnv2_mainloop_ryzen_asm):
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FN_PREFIX(cnv2_mainloop_ryzen_asm):
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@ -35,10 +32,7 @@ FN_PREFIX(cnv2_mainloop_ryzen_asm):
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#include "cn2/cnv2_main_loop_ryzen.inc"
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#include "cn2/cnv2_main_loop_ryzen.inc"
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add rsp, 48
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add rsp, 48
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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FN_PREFIX(cnv2_mainloop_bulldozer_asm):
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FN_PREFIX(cnv2_mainloop_bulldozer_asm):
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@ -47,10 +41,7 @@ FN_PREFIX(cnv2_mainloop_bulldozer_asm):
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#include "cn2/cnv2_main_loop_bulldozer.inc"
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#include "cn2/cnv2_main_loop_bulldozer.inc"
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add rsp, 48
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add rsp, 48
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
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FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
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@ -60,7 +51,4 @@ FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
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#include "cn2/cnv2_double_main_loop_sandybridge.inc"
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#include "cn2/cnv2_double_main_loop_sandybridge.inc"
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add rsp, 48
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add rsp, 48
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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@ -8,40 +8,28 @@ ALIGN(64)
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cnv2_mainloop_ivybridge_asm PROC
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cnv2_mainloop_ivybridge_asm PROC
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INCLUDE cn2/cnv2_main_loop_ivybridge.inc
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INCLUDE cn2/cnv2_main_loop_ivybridge.inc
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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cnv2_mainloop_ivybridge_asm ENDP
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cnv2_mainloop_ivybridge_asm ENDP
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ALIGN(64)
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ALIGN(64)
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cnv2_mainloop_ryzen_asm PROC
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cnv2_mainloop_ryzen_asm PROC
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INCLUDE cn2/cnv2_main_loop_ryzen.inc
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INCLUDE cn2/cnv2_main_loop_ryzen.inc
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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cnv2_mainloop_ryzen_asm ENDP
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cnv2_mainloop_ryzen_asm ENDP
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ALIGN(64)
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ALIGN(64)
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cnv2_mainloop_bulldozer_asm PROC
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cnv2_mainloop_bulldozer_asm PROC
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INCLUDE cn2/cnv2_main_loop_bulldozer.inc
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INCLUDE cn2/cnv2_main_loop_bulldozer.inc
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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cnv2_mainloop_bulldozer_asm ENDP
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cnv2_mainloop_bulldozer_asm ENDP
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ALIGN(64)
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ALIGN(64)
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cnv2_double_mainloop_sandybridge_asm PROC
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cnv2_double_mainloop_sandybridge_asm PROC
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INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
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INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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cnv2_double_mainloop_sandybridge_asm ENDP
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cnv2_double_mainloop_sandybridge_asm ENDP
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_TEXT_CNV2_MAINLOOP ENDS
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_TEXT_CNV2_MAINLOOP ENDS
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@ -10,34 +10,22 @@ ALIGN(64)
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cnv2_mainloop_ivybridge_asm:
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cnv2_mainloop_ivybridge_asm:
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#include "../cn2/cnv2_main_loop_ivybridge.inc"
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#include "../cn2/cnv2_main_loop_ivybridge.inc"
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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cnv2_mainloop_ryzen_asm:
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cnv2_mainloop_ryzen_asm:
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#include "../cn2/cnv2_main_loop_ryzen.inc"
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#include "../cn2/cnv2_main_loop_ryzen.inc"
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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cnv2_mainloop_bulldozer_asm:
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cnv2_mainloop_bulldozer_asm:
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#include "../cn2/cnv2_main_loop_bulldozer.inc"
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#include "../cn2/cnv2_main_loop_bulldozer.inc"
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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ALIGN(64)
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ALIGN(64)
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cnv2_double_mainloop_sandybridge_asm:
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cnv2_double_mainloop_sandybridge_asm:
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#include "../cn2/cnv2_double_main_loop_sandybridge.inc"
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#include "../cn2/cnv2_double_main_loop_sandybridge.inc"
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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|
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@ -8,40 +8,28 @@ ALIGN 64
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cnv2_mainloop_ivybridge_asm PROC
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cnv2_mainloop_ivybridge_asm PROC
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INCLUDE cn2/cnv2_main_loop_ivybridge.inc
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INCLUDE cn2/cnv2_main_loop_ivybridge.inc
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ret 0
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ret 0
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nop
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mov eax, 3735929054
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nop
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nop
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nop
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cnv2_mainloop_ivybridge_asm ENDP
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cnv2_mainloop_ivybridge_asm ENDP
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ALIGN 64
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ALIGN 64
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cnv2_mainloop_ryzen_asm PROC
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cnv2_mainloop_ryzen_asm PROC
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INCLUDE cn2/cnv2_main_loop_ryzen.inc
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INCLUDE cn2/cnv2_main_loop_ryzen.inc
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ret 0
|
ret 0
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nop
|
mov eax, 3735929054
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||||||
nop
|
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nop
|
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nop
|
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cnv2_mainloop_ryzen_asm ENDP
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cnv2_mainloop_ryzen_asm ENDP
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ALIGN 64
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ALIGN 64
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cnv2_mainloop_bulldozer_asm PROC
|
cnv2_mainloop_bulldozer_asm PROC
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INCLUDE cn2/cnv2_main_loop_bulldozer.inc
|
INCLUDE cn2/cnv2_main_loop_bulldozer.inc
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ret 0
|
ret 0
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nop
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mov eax, 3735929054
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||||||
nop
|
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nop
|
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nop
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cnv2_mainloop_bulldozer_asm ENDP
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cnv2_mainloop_bulldozer_asm ENDP
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ALIGN 64
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ALIGN 64
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cnv2_double_mainloop_sandybridge_asm PROC
|
cnv2_double_mainloop_sandybridge_asm PROC
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||||||
INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
|
INCLUDE cn2/cnv2_double_main_loop_sandybridge.inc
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||||||
ret 0
|
ret 0
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||||||
nop
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mov eax, 3735929054
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||||||
nop
|
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||||||
nop
|
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nop
|
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cnv2_double_mainloop_sandybridge_asm ENDP
|
cnv2_double_mainloop_sandybridge_asm ENDP
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||||||
|
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_TEXT_CNV2_MAINLOOP ENDS
|
_TEXT_CNV2_MAINLOOP ENDS
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|
|
|
@ -5,6 +5,7 @@
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||||||
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
|
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
|
||||||
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
|
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
|
||||||
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
|
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
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||||||
|
* Copyright 2018-2019 SChernykh <https://github.com/SChernykh>
|
||||||
* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
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||||||
*
|
*
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||||||
* This program is free software: you can redistribute it and/or modify
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
@ -27,15 +28,15 @@
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||||||
#define APP_ID "xmrig"
|
#define APP_ID "xmrig"
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||||||
#define APP_NAME "XMRig"
|
#define APP_NAME "XMRig"
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||||||
#define APP_DESC "XMRig CPU miner"
|
#define APP_DESC "XMRig CPU miner"
|
||||||
#define APP_VERSION "2.8.5-dev"
|
#define APP_VERSION "2.9.3"
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||||||
#define APP_DOMAIN "xmrig.com"
|
#define APP_DOMAIN "xmrig.com"
|
||||||
#define APP_SITE "www.xmrig.com"
|
#define APP_SITE "www.xmrig.com"
|
||||||
#define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
|
#define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
|
||||||
#define APP_KIND "cpu"
|
#define APP_KIND "cpu"
|
||||||
|
|
||||||
#define APP_VER_MAJOR 2
|
#define APP_VER_MAJOR 2
|
||||||
#define APP_VER_MINOR 8
|
#define APP_VER_MINOR 9
|
||||||
#define APP_VER_PATCH 5
|
#define APP_VER_PATCH 3
|
||||||
|
|
||||||
#ifdef _MSC_VER
|
#ifdef _MSC_VER
|
||||||
# if (_MSC_VER >= 1910)
|
# if (_MSC_VER >= 1910)
|
||||||
|
|
|
@ -69,9 +69,10 @@ static void patchCode(T dst, U src, const uint32_t iterations, const uint32_t ma
|
||||||
# endif
|
# endif
|
||||||
|
|
||||||
size_t size = 0;
|
size_t size = 0;
|
||||||
while (*(uint32_t*)(p + size) != 0x90909090) {
|
while (*(uint32_t*)(p + size) != 0xDEADC0DE) {
|
||||||
++size;
|
++size;
|
||||||
}
|
}
|
||||||
|
size += sizeof(uint32_t);
|
||||||
|
|
||||||
memcpy((void*) dst, (const void*) src, size);
|
memcpy((void*) dst, (const void*) src, size);
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue