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Merge pull request #3254 from SChernykh/dev
Tweaked auto-tuning for Intel CPUs
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commit
7b51e23aa0
1 changed files with 7 additions and 2 deletions
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@ -298,8 +298,10 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
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cores.reserve(m_cores);
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findByType(cache, HWLOC_OBJ_CORE, [&cores](hwloc_obj_t found) { cores.emplace_back(found); });
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const bool L3_exclusive = isCacheExclusive(cache);
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# ifdef XMRIG_ALGO_GHOSTRIDER
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if ((algorithm == Algorithm::GHOSTRIDER_RTM) && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
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if ((algorithm == Algorithm::GHOSTRIDER_RTM) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
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// Don't use E-cores on Alder Lake
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cores.erase(std::remove_if(cores.begin(), cores.end(), [](hwloc_obj_t c) { return hwloc_bitmap_weight(c->cpuset) == 1; }), cores.end());
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@ -311,7 +313,6 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
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# endif
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size_t L3 = cache->attr->cache.size;
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const bool L3_exclusive = isCacheExclusive(cache);
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size_t L2 = 0;
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int L2_associativity = 0;
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size_t extra = 0;
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@ -349,6 +350,10 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
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}
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# ifdef XMRIG_ALGO_RANDOMX
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if ((algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
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// Use all L3+L2 on latest Intel CPUs with P-cores, E-cores and exclusive L3 cache
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cacheHashes = (L3 + L2) / scratchpad;
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}
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if (extra == 0 && algorithm.l2() > 0) {
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cacheHashes = std::min<size_t>(std::max<size_t>(L2 / algorithm.l2(), cores.size()), cacheHashes);
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}
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