From 7d4bdfc91341f398244063a6c9cd614f8fac702f Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 7 Oct 2017 16:55:58 +0300 Subject: [PATCH 01/58] v2.4.0 --- src/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/version.h b/src/version.h index 551bfbb9..7f80dea0 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.0-dev" +#define APP_VERSION "2.4.0" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com" From f02b98efe7b95a1ecf8e961d5b5e1836d945b647 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 7 Oct 2017 18:58:04 +0300 Subject: [PATCH 02/58] Fix clang warnings and job comparison bug. --- CMakeLists.txt | 2 +- src/api/ApiState.h | 1 - src/net/Job.cpp | 2 +- 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 37a00912..e861f26a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -186,7 +186,7 @@ elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC) elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes -Wall") - set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants -Wno-missing-braces") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes -Wall -fno-exceptions -fno-rtti") set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") diff --git a/src/api/ApiState.h b/src/api/ApiState.h index 72a332aa..7ecca36d 100644 --- a/src/api/ApiState.h +++ b/src/api/ApiState.h @@ -57,7 +57,6 @@ private: double m_highestHashrate; double m_totalHashrate[3]; int m_threads; - mutable char m_buf[4096]; NetworkState m_network; }; diff --git a/src/net/Job.cpp b/src/net/Job.cpp index 7295d943..c3d33739 100644 --- a/src/net/Job.cpp +++ b/src/net/Job.cpp @@ -171,5 +171,5 @@ void Job::toHex(const unsigned char* in, unsigned int len, char* out) bool Job::operator==(const Job &other) const { - return m_id == other.m_id && memcmp(m_blob, other.m_blob, sizeof(m_blob) == 0); + return m_id == other.m_id && memcmp(m_blob, other.m_blob, sizeof(m_blob)) == 0; } From b46f376f3294a8277c2e4fefec8a3a84849003d3 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 7 Oct 2017 19:23:46 +0300 Subject: [PATCH 03/58] Remove unused variables . --- CMakeLists.txt | 4 ++-- src/api/Httpd.cpp | 4 ---- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index e861f26a..73c4421b 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -186,9 +186,9 @@ elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC) elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes -Wall") - set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants -Wno-missing-braces") + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes -Wall -fno-exceptions -fno-rtti") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes -Wall -fno-exceptions -fno-rtti -Wno-missing-braces") set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") endif() diff --git a/src/api/Httpd.cpp b/src/api/Httpd.cpp index cb361114..996bc007 100644 --- a/src/api/Httpd.cpp +++ b/src/api/Httpd.cpp @@ -31,10 +31,6 @@ #include "log/Log.h" -static const char k500 [] = "{\"error\":\"INTERNAL_SERVER_ERROR\"}"; -static const size_t k500Size = sizeof(k500) - 1; - - Httpd::Httpd(int port, const char *accessToken) : m_accessToken(accessToken), m_port(port), From a3297b9ea4154599dc6a95bb40d73008a972c95b Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 7 Oct 2017 20:36:02 +0300 Subject: [PATCH 04/58] Fixed 32 bit version crash. --- src/net/Job.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/net/Job.h b/src/net/Job.h index 1ba2d25d..bf8f8835 100644 --- a/src/net/Job.h +++ b/src/net/Job.h @@ -70,6 +70,8 @@ public: bool operator==(const Job &other) const; private: + VAR_ALIGN(16, uint8_t m_blob[84]); // Max blob size is 84 (75 fixed + 9 variable), aligned to 96. https://github.com/xmrig/xmrig/issues/1 Thanks fireice-uk. + bool m_nicehash; int m_poolId; int m_threadId; @@ -77,7 +79,6 @@ private: size_t m_size; uint64_t m_diff; uint64_t m_target; - VAR_ALIGN(16, uint8_t m_blob[84]); // Max blob size is 84 (75 fixed + 9 variable), aligned to 96. https://github.com/xmrig/xmrig/issues/1 Thanks fireice-uk. # ifdef XMRIG_PROXY_PROJECT VAR_ALIGN(16, char m_rawBlob[169]); From f9202c6951f63bec3d00536e9b419ae0bc722f91 Mon Sep 17 00:00:00 2001 From: XMRig Date: Tue, 10 Oct 2017 16:31:19 +0300 Subject: [PATCH 05/58] #147 Fixed comparability with monero-stratum. --- src/net/JobId.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/net/JobId.h b/src/net/JobId.h index e68b3953..06189779 100644 --- a/src/net/JobId.h +++ b/src/net/JobId.h @@ -63,7 +63,7 @@ public: } const size_t size = strlen(id); - if (size < 4 || size >= sizeof(m_data)) { + if (size >= sizeof(m_data)) { return false; } From 4138d4a178f7b65da1c6b71a9dba14165aeb39c8 Mon Sep 17 00:00:00 2001 From: xmrig Date: Thu, 12 Oct 2017 22:40:20 +0300 Subject: [PATCH 06/58] Update README.md --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index e6648bc5..311f8ca3 100644 --- a/README.md +++ b/README.md @@ -3,6 +3,7 @@ XMRig is high performance Monero (XMR) CPU miner, with the official full Windows Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 complete rewritten from scratch on C++. * This is the CPU-mining version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia). +* [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. From 7e4d0d83ff45a4909a7b8731f93a03603fbe0c9f Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 15 Oct 2017 03:42:45 +0300 Subject: [PATCH 07/58] Update CHANGELOG.md --- CHANGELOG.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 090b4363..aa1f8cf2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,6 @@ +# v2.4.1 + - [#147](https://github.com/xmrig/xmrig/issues/147) Fixed comparability with monero-stratum. + # v2.4.0 - Added [HTTP API](https://github.com/xmrig/xmrig/wiki/API). - Added comments support in config file. From bea3bc74b2f53af187045047314c4d6c6e5b55f6 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sun, 15 Oct 2017 04:52:00 +0300 Subject: [PATCH 08/58] v2.4.1. --- src/version.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/version.h b/src/version.h index 7f80dea0..76f61596 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.0" +#define APP_VERSION "2.4.1" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com" @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 0 +#define APP_VER_BUILD 1 #define APP_VER_REV 0 #ifdef _MSC_VER From 1af1ba6b5fe4b3f65afec903dd80b6dfd5f07225 Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 16 Oct 2017 01:26:55 +0300 Subject: [PATCH 09/58] #153 Force reconnect when duplicated job received. --- src/net/Client.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/net/Client.cpp b/src/net/Client.cpp index dfe202a4..c6d683a2 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -220,7 +220,8 @@ bool Client::parseJob(const rapidjson::Value ¶ms, int *code) } if (m_job == job) { - LOG_WARN("[%s:%u] duplicate job received, ignore", m_url.host(), m_url.port()); + LOG_WARN("[%s:%u] duplicate job received, reconnect", m_url.host(), m_url.port()); + close(); return false; } From 9c0fe7310242b84fe33af56a2493603f5324296c Mon Sep 17 00:00:00 2001 From: vcambur Date: Fri, 20 Oct 2017 08:41:08 +0000 Subject: [PATCH 10/58] Some FreeBSD fixes --- CMakeLists.txt | 8 ++++++++ src/Cpu_unix.cpp | 13 +++++++++++-- src/Mem_unix.cpp | 3 ++- src/Platform_unix.cpp | 3 ++- 4 files changed, 23 insertions(+), 4 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 73c4421b..f0d81e2f 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -122,6 +122,14 @@ elseif (APPLE) src/Mem_unix.cpp src/Platform_mac.cpp ) +elseif (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) + set(SOURCES_OS + src/App_unix.cpp + src/Cpu_unix.cpp + src/Mem_unix.cpp + src/Platform_unix.cpp + ) +set(EXTRA_LIBS pthread kvm) else() set(SOURCES_OS src/App_unix.cpp diff --git a/src/Cpu_unix.cpp b/src/Cpu_unix.cpp index 5d3a6d64..ca1225df 100644 --- a/src/Cpu_unix.cpp +++ b/src/Cpu_unix.cpp @@ -20,8 +20,12 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ - - +#ifdef __FreeBSD__ +#include +#include +#include +#include +#endif #include #include #include @@ -30,6 +34,9 @@ #include "Cpu.h" +#ifdef __FreeBSD__ +typedef cpuset_t cpu_set_t; +#endif void Cpu::init() { @@ -53,7 +60,9 @@ void Cpu::setAffinity(int id, uint64_t mask) } if (id == -1) { + #ifndef __FreeBSD__ sched_setaffinity(0, sizeof(&set), &set); + #endif } else { pthread_setaffinity_np(pthread_self(), sizeof(&set), &set); } diff --git a/src/Mem_unix.cpp b/src/Mem_unix.cpp index 7c41fd16..2cb14bc9 100644 --- a/src/Mem_unix.cpp +++ b/src/Mem_unix.cpp @@ -51,10 +51,11 @@ bool Mem::allocate(int algo, int threads, bool doubleHash, bool enabled) # if defined(__APPLE__) m_memory = static_cast(mmap(0, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, VM_FLAGS_SUPERPAGE_SIZE_2MB, 0)); +# elif defined(__FreeBSD__) + m_memory = static_cast(mmap(0, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_ALIGNED_SUPER | MAP_PREFAULT_READ, -1, 0)); # else m_memory = static_cast(mmap(0, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_HUGETLB | MAP_POPULATE, 0, 0)); # endif - if (m_memory == MAP_FAILED) { m_memory = static_cast(_mm_malloc(size, 16)); return true; diff --git a/src/Platform_unix.cpp b/src/Platform_unix.cpp index 27d8de37..b6d16d6f 100644 --- a/src/Platform_unix.cpp +++ b/src/Platform_unix.cpp @@ -21,7 +21,6 @@ * along with this program. If not, see . */ - #include #include #include @@ -116,6 +115,7 @@ void Platform::setThreadPriority(int priority) setpriority(PRIO_PROCESS, 0, prio); +#ifdef SCHED_IDLE if (priority == 0) { sched_param param; param.sched_priority = 0; @@ -124,4 +124,5 @@ void Platform::setThreadPriority(int priority) sched_setscheduler(0, SCHED_BATCH, ¶m); } } +#endif } From 10df3ec227e253b3799d4420c42ac04a08244faf Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 20 Oct 2017 19:54:18 +0300 Subject: [PATCH 11/58] Code style fixes for FreeBSD support pull request. --- CMakeLists.txt | 12 ++++-------- src/Cpu_unix.cpp | 18 ++++++++++++------ src/Platform_unix.cpp | 4 ++-- 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index f0d81e2f..7e102fc5 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -122,14 +122,6 @@ elseif (APPLE) src/Mem_unix.cpp src/Platform_mac.cpp ) -elseif (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) - set(SOURCES_OS - src/App_unix.cpp - src/Cpu_unix.cpp - src/Mem_unix.cpp - src/Platform_unix.cpp - ) -set(EXTRA_LIBS pthread kvm) else() set(SOURCES_OS src/App_unix.cpp @@ -141,6 +133,10 @@ else() set(EXTRA_LIBS pthread) endif() +if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) + set(EXTRA_LIBS ${EXTRA_LIBS} kvm) +endif() + add_definitions(/D__STDC_FORMAT_MACROS) add_definitions(/DUNICODE) add_definitions(/DRAPIDJSON_SSE2) diff --git a/src/Cpu_unix.cpp b/src/Cpu_unix.cpp index ca1225df..8de98c8c 100644 --- a/src/Cpu_unix.cpp +++ b/src/Cpu_unix.cpp @@ -20,12 +20,16 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ + + #ifdef __FreeBSD__ -#include -#include -#include -#include +# include +# include +# include +# include #endif + + #include #include #include @@ -34,10 +38,12 @@ #include "Cpu.h" + #ifdef __FreeBSD__ typedef cpuset_t cpu_set_t; #endif + void Cpu::init() { # ifdef XMRIG_NO_LIBCPUID @@ -60,9 +66,9 @@ void Cpu::setAffinity(int id, uint64_t mask) } if (id == -1) { - #ifndef __FreeBSD__ +# ifndef __FreeBSD__ sched_setaffinity(0, sizeof(&set), &set); - #endif +# endif } else { pthread_setaffinity_np(pthread_self(), sizeof(&set), &set); } diff --git a/src/Platform_unix.cpp b/src/Platform_unix.cpp index b6d16d6f..ecccc49e 100644 --- a/src/Platform_unix.cpp +++ b/src/Platform_unix.cpp @@ -115,7 +115,7 @@ void Platform::setThreadPriority(int priority) setpriority(PRIO_PROCESS, 0, prio); -#ifdef SCHED_IDLE +# ifdef SCHED_IDLE if (priority == 0) { sched_param param; param.sched_priority = 0; @@ -124,5 +124,5 @@ void Platform::setThreadPriority(int priority) sched_setscheduler(0, SCHED_BATCH, ¶m); } } -#endif +# endif } From a7c0ba6d2887a32a5a714d863682cca495ff1f97 Mon Sep 17 00:00:00 2001 From: xmrig Date: Mon, 23 Oct 2017 14:10:37 +0300 Subject: [PATCH 12/58] Update CHANGELOG.md --- CHANGELOG.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index aa1f8cf2..cf4b2101 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,7 @@ +# v2.4.2 + - [#60](https://github.com/xmrig/xmrig/issues/60) Added FreeBSD support, thanks [vcambur](https://github.com/vcambur). + - [#153](https://github.com/xmrig/xmrig/issues/153) Fixed issues with dwarfpool.com. + # v2.4.1 - [#147](https://github.com/xmrig/xmrig/issues/147) Fixed comparability with monero-stratum. From fd029201b00bab2948cbe0ed67ff162e10aa9dfe Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 23 Oct 2017 15:32:07 +0300 Subject: [PATCH 13/58] v2.4.2. --- src/net/Client.cpp | 5 ++++- src/version.h | 4 ++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/net/Client.cpp b/src/net/Client.cpp index c6d683a2..88134ae7 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -220,7 +220,10 @@ bool Client::parseJob(const rapidjson::Value ¶ms, int *code) } if (m_job == job) { - LOG_WARN("[%s:%u] duplicate job received, reconnect", m_url.host(), m_url.port()); + if (!m_quiet) { + LOG_WARN("[%s:%u] duplicate job received, reconnect", m_url.host(), m_url.port()); + } + close(); return false; } diff --git a/src/version.h b/src/version.h index 76f61596..8d2e992f 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.1" +#define APP_VERSION "2.4.2" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com" @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 1 +#define APP_VER_BUILD 2 #define APP_VER_REV 0 #ifdef _MSC_VER From 6479d6bb6f29bbace7ba0c3c22ecf0edb003030f Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 30 Oct 2017 00:48:49 +0300 Subject: [PATCH 14/58] #157 Explicitly add linking with librt, probably fix build issue with some old Linux. --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 7e102fc5..fc01ed30 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -130,7 +130,7 @@ else() src/Platform_unix.cpp ) - set(EXTRA_LIBS pthread) + set(EXTRA_LIBS pthread rt) endif() if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) From c384df9651a45467088848bf5450c8c1fa513d62 Mon Sep 17 00:00:00 2001 From: xmrig Date: Thu, 2 Nov 2017 03:37:58 +0300 Subject: [PATCH 15/58] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 311f8ca3..b9ca1309 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,7 @@ XMRig is high performance Monero (XMR) CPU miner, with the official full Windows support. Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 complete rewritten from scratch on C++. -* This is the CPU-mining version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia). +* This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. From ee441b6b9a03f1d400fb93f67fb079e7f24b590e Mon Sep 17 00:00:00 2001 From: xmrig Date: Thu, 2 Nov 2017 03:39:47 +0300 Subject: [PATCH 16/58] Update README.md --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index b9ca1309..50ab830b 100644 --- a/README.md +++ b/README.md @@ -39,12 +39,12 @@ Originally based on cpuminer-multi with heavy optimizations/rewrites and removin ## Usage ### Basic example ``` -xmrig.exe -o pool.minemonero.pro:5555 -u YOUR_WALLET -p x -k +xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k ``` ### Failover ``` -xmrig.exe -o pool.minemonero.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k +xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k ``` For failover you can add multiple pools, maximum count not limited. From 1391a2d8582e91fb38bf3c5a09974f1734ea6ff4 Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 2 Nov 2017 19:40:33 +0300 Subject: [PATCH 17/58] #184 Workaround for CPUs with disabled Hyper-Threading. --- src/Cpu.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/Cpu.cpp b/src/Cpu.cpp index 2e79b6df..ff6f49e9 100644 --- a/src/Cpu.cpp +++ b/src/Cpu.cpp @@ -86,9 +86,13 @@ void Cpu::initCommon() strncpy(m_brand, data.brand_str, sizeof(m_brand) - 1); m_totalThreads = data.total_logical_cpus; - m_sockets = m_totalThreads / data.num_logical_cpus; - m_totalCores = data.num_cores *m_sockets; + m_sockets = m_totalThreads / data.num_logical_cpus; + if (m_sockets == 0) { + m_sockets = 1; + } + + m_totalCores = data.num_cores * m_sockets; m_l3_cache = data.l3_cache > 0 ? data.l3_cache * m_sockets : 0; // Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97 From c0e849b394811ceeb7b17e5cb52ac329f1e25a79 Mon Sep 17 00:00:00 2001 From: xmrig Date: Thu, 2 Nov 2017 19:49:25 +0300 Subject: [PATCH 18/58] Update CHANGELOG.md --- CHANGELOG.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index cf4b2101..8a40a859 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,6 @@ +# v2.4.3 + - [#184](https://github.com/xmrig/xmrig/issues/184) Fixed cache size detection for CPUs with disabled Hyper-Threading. + # v2.4.2 - [#60](https://github.com/xmrig/xmrig/issues/60) Added FreeBSD support, thanks [vcambur](https://github.com/vcambur). - [#153](https://github.com/xmrig/xmrig/issues/153) Fixed issues with dwarfpool.com. From d403dcf95c815e36d0b453704e9b7e17baec868b Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 3 Nov 2017 05:35:29 +0300 Subject: [PATCH 19/58] Optimized software aes. --- CMakeLists.txt | 3 +- src/crypto/CryptoNight_p.h | 21 ++-- src/crypto/soft_aes.c | 212 ------------------------------------- src/crypto/soft_aes.h | 125 ++++++++++++++++++++++ 4 files changed, 136 insertions(+), 225 deletions(-) delete mode 100644 src/crypto/soft_aes.c create mode 100644 src/crypto/soft_aes.h diff --git a/CMakeLists.txt b/CMakeLists.txt index fc01ed30..c86fe953 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -61,6 +61,7 @@ set(HEADERS_CRYPTO src/crypto/groestl_tables.h src/crypto/hash.h src/crypto/skein_port.h + src/crypto/soft_aes.h ) set(SOURCES @@ -99,8 +100,6 @@ set(SOURCES_CRYPTO src/crypto/c_blake256.c src/crypto/c_jh.c src/crypto/c_skein.c - src/crypto/soft_aes.c - src/crypto/soft_aes.c src/crypto/CryptoNight.cpp ) diff --git a/src/crypto/CryptoNight_p.h b/src/crypto/CryptoNight_p.h index b85a9da6..75809b81 100644 --- a/src/crypto/CryptoNight_p.h +++ b/src/crypto/CryptoNight_p.h @@ -34,6 +34,7 @@ #include "crypto/CryptoNight.h" +#include "crypto/soft_aes.h" extern "C" @@ -43,9 +44,6 @@ extern "C" #include "crypto/c_blake256.h" #include "crypto/c_jh.h" #include "crypto/c_skein.h" - -__m128i soft_aesenc(__m128i in, __m128i key); -__m128i soft_aeskeygenassist(__m128i key, uint8_t rcon); } @@ -151,13 +149,14 @@ static inline void aes_genkey_sub(__m128i* xout0, __m128i* xout2) } -static inline void soft_aes_genkey_sub(__m128i* xout0, __m128i* xout2, uint8_t rcon) +template +static inline void soft_aes_genkey_sub(__m128i* xout0, __m128i* xout2) { - __m128i xout1 = soft_aeskeygenassist(*xout2, rcon); + __m128i xout1 = soft_aeskeygenassist(*xout2); xout1 = _mm_shuffle_epi32(xout1, 0xFF); // see PSHUFD, set all elems to 4th elem *xout0 = sl_xor(*xout0); *xout0 = _mm_xor_si128(*xout0, xout1); - xout1 = soft_aeskeygenassist(*xout0, 0x00); + xout1 = soft_aeskeygenassist<0x00>(*xout0); xout1 = _mm_shuffle_epi32(xout1, 0xAA); // see PSHUFD, set all elems to 3rd elem *xout2 = sl_xor(*xout2); *xout2 = _mm_xor_si128(*xout2, xout1); @@ -168,23 +167,23 @@ template static inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i* k2, __m128i* k3, __m128i* k4, __m128i* k5, __m128i* k6, __m128i* k7, __m128i* k8, __m128i* k9) { __m128i xout0 = _mm_load_si128(memory); - __m128i xout2 = _mm_load_si128(memory +1 ); + __m128i xout2 = _mm_load_si128(memory + 1); *k0 = xout0; *k1 = xout2; - SOFT_AES ? soft_aes_genkey_sub(&xout0, &xout2, 0x01) : aes_genkey_sub<0x01>(&xout0, &xout2); + SOFT_AES ? soft_aes_genkey_sub<0x01>(&xout0, &xout2) : aes_genkey_sub<0x01>(&xout0, &xout2); *k2 = xout0; *k3 = xout2; - SOFT_AES ? soft_aes_genkey_sub(&xout0, &xout2, 0x02) : aes_genkey_sub<0x02>(&xout0, &xout2); + SOFT_AES ? soft_aes_genkey_sub<0x02>(&xout0, &xout2) : aes_genkey_sub<0x02>(&xout0, &xout2); *k4 = xout0; *k5 = xout2; - SOFT_AES ? soft_aes_genkey_sub(&xout0, &xout2, 0x04) : aes_genkey_sub<0x04>(&xout0, &xout2); + SOFT_AES ? soft_aes_genkey_sub<0x04>(&xout0, &xout2) : aes_genkey_sub<0x04>(&xout0, &xout2); *k6 = xout0; *k7 = xout2; - SOFT_AES ? soft_aes_genkey_sub(&xout0, &xout2, 0x08) : aes_genkey_sub<0x08>(&xout0, &xout2); + SOFT_AES ? soft_aes_genkey_sub<0x08>(&xout0, &xout2) : aes_genkey_sub<0x08>(&xout0, &xout2); *k8 = xout0; *k9 = xout2; } diff --git a/src/crypto/soft_aes.c b/src/crypto/soft_aes.c deleted file mode 100644 index 6904c526..00000000 --- a/src/crypto/soft_aes.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - * Additional permission under GNU GPL version 3 section 7 - * - * If you modify this Program, or any covered work, by linking or combining - * it with OpenSSL (or a modified version of that library), containing parts - * covered by the terms of OpenSSL License and SSLeay License, the licensors - * of this Program grant you additional permission to convey the resulting work. - * - */ - -/* - * The orginal author of this AES implementation is Karl Malbrain. - */ - -#ifdef __GNUC__ -#include -#else -#include -#endif // __GNUC__ - -#include - -#define TABLE_ALIGN 32 -#define WPOLY 0x011b -#define N_COLS 4 -#define AES_BLOCK_SIZE 16 -#define RC_LENGTH (5 * (AES_BLOCK_SIZE / 4 - 2)) - -#if defined(_MSC_VER) -#define ALIGN __declspec(align(TABLE_ALIGN)) -#elif defined(__GNUC__) -#define ALIGN __attribute__ ((aligned(16))) -#else -#define ALIGN -#endif - -#define rf1(r,c) (r) -#define word_in(x,c) (*((uint32_t*)(x)+(c))) -#define word_out(x,c,v) (*((uint32_t*)(x)+(c)) = (v)) - -#define s(x,c) x[c] -#define si(y,x,c) (s(y,c) = word_in(x, c)) -#define so(y,x,c) word_out(y, c, s(x,c)) -#define state_in(y,x) si(y,x,0); si(y,x,1); si(y,x,2); si(y,x,3) -#define state_out(y,x) so(y,x,0); so(y,x,1); so(y,x,2); so(y,x,3) -#define round(y,x,k) \ -y[0] = (k)[0] ^ (t_fn[0][x[0] & 0xff] ^ t_fn[1][(x[1] >> 8) & 0xff] ^ t_fn[2][(x[2] >> 16) & 0xff] ^ t_fn[3][x[3] >> 24]); \ -y[1] = (k)[1] ^ (t_fn[0][x[1] & 0xff] ^ t_fn[1][(x[2] >> 8) & 0xff] ^ t_fn[2][(x[3] >> 16) & 0xff] ^ t_fn[3][x[0] >> 24]); \ -y[2] = (k)[2] ^ (t_fn[0][x[2] & 0xff] ^ t_fn[1][(x[3] >> 8) & 0xff] ^ t_fn[2][(x[0] >> 16) & 0xff] ^ t_fn[3][x[1] >> 24]); \ -y[3] = (k)[3] ^ (t_fn[0][x[3] & 0xff] ^ t_fn[1][(x[0] >> 8) & 0xff] ^ t_fn[2][(x[1] >> 16) & 0xff] ^ t_fn[3][x[2] >> 24]); -#define to_byte(x) ((x) & 0xff) -#define bval(x,n) to_byte((x) >> (8 * (n))) - -#define fwd_var(x,r,c)\ - ( r == 0 ? ( c == 0 ? s(x,0) : c == 1 ? s(x,1) : c == 2 ? s(x,2) : s(x,3))\ - : r == 1 ? ( c == 0 ? s(x,1) : c == 1 ? s(x,2) : c == 2 ? s(x,3) : s(x,0))\ - : r == 2 ? ( c == 0 ? s(x,2) : c == 1 ? s(x,3) : c == 2 ? s(x,0) : s(x,1))\ - : ( c == 0 ? s(x,3) : c == 1 ? s(x,0) : c == 2 ? s(x,1) : s(x,2))) - -#define fwd_rnd(y,x,k,c) (s(y,c) = (k)[c] ^ four_tables(x,t_use(f,n),fwd_var,rf1,c)) - -#define sb_data(w) {\ - w(0x63), w(0x7c), w(0x77), w(0x7b), w(0xf2), w(0x6b), w(0x6f), w(0xc5),\ - w(0x30), w(0x01), w(0x67), w(0x2b), w(0xfe), w(0xd7), w(0xab), w(0x76),\ - w(0xca), w(0x82), w(0xc9), w(0x7d), w(0xfa), w(0x59), w(0x47), w(0xf0),\ - w(0xad), w(0xd4), w(0xa2), w(0xaf), w(0x9c), w(0xa4), w(0x72), w(0xc0),\ - w(0xb7), w(0xfd), w(0x93), w(0x26), w(0x36), w(0x3f), w(0xf7), w(0xcc),\ - w(0x34), w(0xa5), w(0xe5), w(0xf1), w(0x71), w(0xd8), w(0x31), w(0x15),\ - w(0x04), w(0xc7), w(0x23), w(0xc3), w(0x18), w(0x96), w(0x05), w(0x9a),\ - w(0x07), w(0x12), w(0x80), w(0xe2), w(0xeb), w(0x27), w(0xb2), w(0x75),\ - w(0x09), w(0x83), w(0x2c), w(0x1a), w(0x1b), w(0x6e), w(0x5a), w(0xa0),\ - w(0x52), w(0x3b), w(0xd6), w(0xb3), w(0x29), w(0xe3), w(0x2f), w(0x84),\ - w(0x53), w(0xd1), w(0x00), w(0xed), w(0x20), w(0xfc), w(0xb1), w(0x5b),\ - w(0x6a), w(0xcb), w(0xbe), w(0x39), w(0x4a), w(0x4c), w(0x58), w(0xcf),\ - w(0xd0), w(0xef), w(0xaa), w(0xfb), w(0x43), w(0x4d), w(0x33), w(0x85),\ - w(0x45), w(0xf9), w(0x02), w(0x7f), w(0x50), w(0x3c), w(0x9f), w(0xa8),\ - w(0x51), w(0xa3), w(0x40), w(0x8f), w(0x92), w(0x9d), w(0x38), w(0xf5),\ - w(0xbc), w(0xb6), w(0xda), w(0x21), w(0x10), w(0xff), w(0xf3), w(0xd2),\ - w(0xcd), w(0x0c), w(0x13), w(0xec), w(0x5f), w(0x97), w(0x44), w(0x17),\ - w(0xc4), w(0xa7), w(0x7e), w(0x3d), w(0x64), w(0x5d), w(0x19), w(0x73),\ - w(0x60), w(0x81), w(0x4f), w(0xdc), w(0x22), w(0x2a), w(0x90), w(0x88),\ - w(0x46), w(0xee), w(0xb8), w(0x14), w(0xde), w(0x5e), w(0x0b), w(0xdb),\ - w(0xe0), w(0x32), w(0x3a), w(0x0a), w(0x49), w(0x06), w(0x24), w(0x5c),\ - w(0xc2), w(0xd3), w(0xac), w(0x62), w(0x91), w(0x95), w(0xe4), w(0x79),\ - w(0xe7), w(0xc8), w(0x37), w(0x6d), w(0x8d), w(0xd5), w(0x4e), w(0xa9),\ - w(0x6c), w(0x56), w(0xf4), w(0xea), w(0x65), w(0x7a), w(0xae), w(0x08),\ - w(0xba), w(0x78), w(0x25), w(0x2e), w(0x1c), w(0xa6), w(0xb4), w(0xc6),\ - w(0xe8), w(0xdd), w(0x74), w(0x1f), w(0x4b), w(0xbd), w(0x8b), w(0x8a),\ - w(0x70), w(0x3e), w(0xb5), w(0x66), w(0x48), w(0x03), w(0xf6), w(0x0e),\ - w(0x61), w(0x35), w(0x57), w(0xb9), w(0x86), w(0xc1), w(0x1d), w(0x9e),\ - w(0xe1), w(0xf8), w(0x98), w(0x11), w(0x69), w(0xd9), w(0x8e), w(0x94),\ - w(0x9b), w(0x1e), w(0x87), w(0xe9), w(0xce), w(0x55), w(0x28), w(0xdf),\ - w(0x8c), w(0xa1), w(0x89), w(0x0d), w(0xbf), w(0xe6), w(0x42), w(0x68),\ - w(0x41), w(0x99), w(0x2d), w(0x0f), w(0xb0), w(0x54), w(0xbb), w(0x16) } - -#define rc_data(w) {\ - w(0x01), w(0x02), w(0x04), w(0x08), w(0x10),w(0x20), w(0x40), w(0x80),\ - w(0x1b), w(0x36) } - -#define bytes2word(b0, b1, b2, b3) (((uint32_t)(b3) << 24) | \ - ((uint32_t)(b2) << 16) | ((uint32_t)(b1) << 8) | (b0)) - -#define h0(x) (x) -#define w0(p) bytes2word(p, 0, 0, 0) -#define w1(p) bytes2word(0, p, 0, 0) -#define w2(p) bytes2word(0, 0, p, 0) -#define w3(p) bytes2word(0, 0, 0, p) - -#define u0(p) bytes2word(f2(p), p, p, f3(p)) -#define u1(p) bytes2word(f3(p), f2(p), p, p) -#define u2(p) bytes2word(p, f3(p), f2(p), p) -#define u3(p) bytes2word(p, p, f3(p), f2(p)) - -#define v0(p) bytes2word(fe(p), f9(p), fd(p), fb(p)) -#define v1(p) bytes2word(fb(p), fe(p), f9(p), fd(p)) -#define v2(p) bytes2word(fd(p), fb(p), fe(p), f9(p)) -#define v3(p) bytes2word(f9(p), fd(p), fb(p), fe(p)) - -#define f2(x) ((x<<1) ^ (((x>>7) & 1) * WPOLY)) -#define f4(x) ((x<<2) ^ (((x>>6) & 1) * WPOLY) ^ (((x>>6) & 2) * WPOLY)) -#define f8(x) ((x<<3) ^ (((x>>5) & 1) * WPOLY) ^ (((x>>5) & 2) * WPOLY) ^ (((x>>5) & 4) * WPOLY)) -#define f3(x) (f2(x) ^ x) -#define f9(x) (f8(x) ^ x) -#define fb(x) (f8(x) ^ f2(x) ^ x) -#define fd(x) (f8(x) ^ f4(x) ^ x) -#define fe(x) (f8(x) ^ f4(x) ^ f2(x)) - -#define t_dec(m,n) t_##m##n -#define t_set(m,n) t_##m##n -#define t_use(m,n) t_##m##n - -#define d_4(t,n,b,e,f,g,h) ALIGN const t n[4][256] = { b(e), b(f), b(g), b(h) } - -#define four_tables(x,tab,vf,rf,c) \ - (tab[0][bval(vf(x,0,c),rf(0,c))] \ - ^ tab[1][bval(vf(x,1,c),rf(1,c))] \ - ^ tab[2][bval(vf(x,2,c),rf(2,c))] \ - ^ tab[3][bval(vf(x,3,c),rf(3,c))]) - -d_4(uint32_t, t_dec(f,n), sb_data, u0, u1, u2, u3); - -__m128i soft_aesenc(__m128i in, __m128i key) -{ - uint32_t x0, x1, x2, x3; - x0 = _mm_cvtsi128_si32(in); - x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); - x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); - x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); - - __m128i out = _mm_set_epi32( - (t_fn[0][x3 & 0xff] ^ t_fn[1][(x0 >> 8) & 0xff] ^ t_fn[2][(x1 >> 16) & 0xff] ^ t_fn[3][x2 >> 24]), - (t_fn[0][x2 & 0xff] ^ t_fn[1][(x3 >> 8) & 0xff] ^ t_fn[2][(x0 >> 16) & 0xff] ^ t_fn[3][x1 >> 24]), - (t_fn[0][x1 & 0xff] ^ t_fn[1][(x2 >> 8) & 0xff] ^ t_fn[2][(x3 >> 16) & 0xff] ^ t_fn[3][x0 >> 24]), - (t_fn[0][x0 & 0xff] ^ t_fn[1][(x1 >> 8) & 0xff] ^ t_fn[2][(x2 >> 16) & 0xff] ^ t_fn[3][x3 >> 24])); - - return _mm_xor_si128(out, key); -} - -uint8_t Sbox[256] = { // forward s-box -0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, -0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, -0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, -0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, -0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, -0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, -0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, -0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, -0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, -0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, -0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, -0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, -0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, -0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, -0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, -0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16}; - -static inline void sub_word(uint8_t* key) -{ - key[0] = Sbox[key[0]]; - key[1] = Sbox[key[1]]; - key[2] = Sbox[key[2]]; - key[3] = Sbox[key[3]]; -} - -#ifdef __clang__ -uint32_t _rotr(uint32_t value, uint32_t amount) -{ - return (value >> amount) | (value << ((32 - amount) & 31)); -} -#endif - -__m128i soft_aeskeygenassist(__m128i key, uint8_t rcon) -{ - uint32_t X1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(key, 0x55)); - uint32_t X3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(key, 0xFF)); - sub_word((uint8_t*)&X1); - sub_word((uint8_t*)&X3); - return _mm_set_epi32(_rotr(X3, 8) ^ rcon, X3,_rotr(X1, 8) ^ rcon, X1); -} diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h new file mode 100644 index 00000000..e28be3fa --- /dev/null +++ b/src/crypto/soft_aes.h @@ -0,0 +1,125 @@ +/* + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + * Additional permission under GNU GPL version 3 section 7 + * + * If you modify this Program, or any covered work, by linking or combining + * it with OpenSSL (or a modified version of that library), containing parts + * covered by the terms of OpenSSL License and SSLeay License, the licensors + * of this Program grant you additional permission to convey the resulting work. + * + */ + +/* + * Parts of this file are originally copyright (c) 2014-2017, The Monero Project + */ +#pragma once + +#ifdef __GNUC__ +#include +#else +#include +#endif // __GNUC__ + +#include + +#define saes_data(w) {\ + w(0x63), w(0x7c), w(0x77), w(0x7b), w(0xf2), w(0x6b), w(0x6f), w(0xc5),\ + w(0x30), w(0x01), w(0x67), w(0x2b), w(0xfe), w(0xd7), w(0xab), w(0x76),\ + w(0xca), w(0x82), w(0xc9), w(0x7d), w(0xfa), w(0x59), w(0x47), w(0xf0),\ + w(0xad), w(0xd4), w(0xa2), w(0xaf), w(0x9c), w(0xa4), w(0x72), w(0xc0),\ + w(0xb7), w(0xfd), w(0x93), w(0x26), w(0x36), w(0x3f), w(0xf7), w(0xcc),\ + w(0x34), w(0xa5), w(0xe5), w(0xf1), w(0x71), w(0xd8), w(0x31), w(0x15),\ + w(0x04), w(0xc7), w(0x23), w(0xc3), w(0x18), w(0x96), w(0x05), w(0x9a),\ + w(0x07), w(0x12), w(0x80), w(0xe2), w(0xeb), w(0x27), w(0xb2), w(0x75),\ + w(0x09), w(0x83), w(0x2c), w(0x1a), w(0x1b), w(0x6e), w(0x5a), w(0xa0),\ + w(0x52), w(0x3b), w(0xd6), w(0xb3), w(0x29), w(0xe3), w(0x2f), w(0x84),\ + w(0x53), w(0xd1), w(0x00), w(0xed), w(0x20), w(0xfc), w(0xb1), w(0x5b),\ + w(0x6a), w(0xcb), w(0xbe), w(0x39), w(0x4a), w(0x4c), w(0x58), w(0xcf),\ + w(0xd0), w(0xef), w(0xaa), w(0xfb), w(0x43), w(0x4d), w(0x33), w(0x85),\ + w(0x45), w(0xf9), w(0x02), w(0x7f), w(0x50), w(0x3c), w(0x9f), w(0xa8),\ + w(0x51), w(0xa3), w(0x40), w(0x8f), w(0x92), w(0x9d), w(0x38), w(0xf5),\ + w(0xbc), w(0xb6), w(0xda), w(0x21), w(0x10), w(0xff), w(0xf3), w(0xd2),\ + w(0xcd), w(0x0c), w(0x13), w(0xec), w(0x5f), w(0x97), w(0x44), w(0x17),\ + w(0xc4), w(0xa7), w(0x7e), w(0x3d), w(0x64), w(0x5d), w(0x19), w(0x73),\ + w(0x60), w(0x81), w(0x4f), w(0xdc), w(0x22), w(0x2a), w(0x90), w(0x88),\ + w(0x46), w(0xee), w(0xb8), w(0x14), w(0xde), w(0x5e), w(0x0b), w(0xdb),\ + w(0xe0), w(0x32), w(0x3a), w(0x0a), w(0x49), w(0x06), w(0x24), w(0x5c),\ + w(0xc2), w(0xd3), w(0xac), w(0x62), w(0x91), w(0x95), w(0xe4), w(0x79),\ + w(0xe7), w(0xc8), w(0x37), w(0x6d), w(0x8d), w(0xd5), w(0x4e), w(0xa9),\ + w(0x6c), w(0x56), w(0xf4), w(0xea), w(0x65), w(0x7a), w(0xae), w(0x08),\ + w(0xba), w(0x78), w(0x25), w(0x2e), w(0x1c), w(0xa6), w(0xb4), w(0xc6),\ + w(0xe8), w(0xdd), w(0x74), w(0x1f), w(0x4b), w(0xbd), w(0x8b), w(0x8a),\ + w(0x70), w(0x3e), w(0xb5), w(0x66), w(0x48), w(0x03), w(0xf6), w(0x0e),\ + w(0x61), w(0x35), w(0x57), w(0xb9), w(0x86), w(0xc1), w(0x1d), w(0x9e),\ + w(0xe1), w(0xf8), w(0x98), w(0x11), w(0x69), w(0xd9), w(0x8e), w(0x94),\ + w(0x9b), w(0x1e), w(0x87), w(0xe9), w(0xce), w(0x55), w(0x28), w(0xdf),\ + w(0x8c), w(0xa1), w(0x89), w(0x0d), w(0xbf), w(0xe6), w(0x42), w(0x68),\ + w(0x41), w(0x99), w(0x2d), w(0x0f), w(0xb0), w(0x54), w(0xbb), w(0x16) } + +#define SAES_WPOLY 0x011b + +#define saes_b2w(b0, b1, b2, b3) (((uint32_t)(b3) << 24) | \ + ((uint32_t)(b2) << 16) | ((uint32_t)(b1) << 8) | (b0)) + +#define saes_f2(x) ((x<<1) ^ (((x>>7) & 1) * SAES_WPOLY)) +#define saes_f3(x) (saes_f2(x) ^ x) +#define saes_h0(x) (x) + +#define saes_u0(p) saes_b2w(saes_f2(p), p, p, saes_f3(p)) +#define saes_u1(p) saes_b2w(saes_f3(p), saes_f2(p), p, p) +#define saes_u2(p) saes_b2w( p, saes_f3(p), saes_f2(p), p) +#define saes_u3(p) saes_b2w( p, p, saes_f3(p), saes_f2(p)) + +alignas(16) const uint32_t saes_table[4][256] = { saes_data(saes_u0), saes_data(saes_u1), saes_data(saes_u2), saes_data(saes_u3) }; +alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); + +static inline __m128i soft_aesenc(__m128i in, __m128i key) +{ + const uint32_t x0 = _mm_cvtsi128_si32(in); + const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); + const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); + const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); + + __m128i out = _mm_set_epi32( + (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), + (saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]), + (saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]), + (saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24])); + + return _mm_xor_si128(out, key); +} + +static inline uint32_t sub_word(uint32_t key) +{ + return (saes_sbox[key >> 24 ] << 24) | + (saes_sbox[(key >> 16) & 0xff] << 16 ) | + (saes_sbox[(key >> 8) & 0xff] << 8 ) | + saes_sbox[key & 0xff]; +} + +#ifdef __clang__ +static inline uint32_t _rotr(uint32_t value, uint32_t amount) +{ + return (value >> amount) | (value << ((32 - amount) & 31)); +} +#endif + +template +static inline __m128i soft_aeskeygenassist(__m128i key) +{ + const uint32_t X1 = sub_word(_mm_cvtsi128_si32(_mm_shuffle_epi32(key, 0x55))); + const uint32_t X3 = sub_word(_mm_cvtsi128_si32(_mm_shuffle_epi32(key, 0xFF))); + return _mm_set_epi32(_rotr(X3, 8) ^ rcon, X3, _rotr(X1, 8) ^ rcon, X1); +} From 6cc152e26fe438b23a522caf28670817906d761b Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 6 Nov 2017 03:11:35 +0300 Subject: [PATCH 20/58] Added ARMv8 (aarch64) support. --- CMakeLists.txt | 67 +- cmake/cpu.cmake | 16 + cmake/flags.cmake | 63 + src/3rdparty/aligned_malloc.h | 65 + src/Cpu_arm.cpp | 52 + src/Mem_unix.cpp | 8 +- src/crypto/CryptoNight.cpp | 8 +- src/crypto/CryptoNight_arm64.h | 458 +++++ .../{CryptoNight_p.h => CryptoNight_x86.h} | 0 src/crypto/SSE2NEON.h | 1497 +++++++++++++++++ src/crypto/soft_aes.h | 14 +- 11 files changed, 2188 insertions(+), 60 deletions(-) create mode 100644 cmake/cpu.cmake create mode 100644 cmake/flags.cmake create mode 100644 src/3rdparty/aligned_malloc.h create mode 100644 src/Cpu_arm.cpp create mode 100644 src/crypto/CryptoNight_arm64.h rename src/crypto/{CryptoNight_p.h => CryptoNight_x86.h} (100%) create mode 100644 src/crypto/SSE2NEON.h diff --git a/CMakeLists.txt b/CMakeLists.txt index c86fe953..0275320f 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -6,6 +6,7 @@ option(WITH_AEON "CryptoNight-Lite support" ON) option(WITH_HTTPD "HTTP REST API" ON) include (CheckIncludeFile) +include (cmake/cpu.cmake) set(HEADERS @@ -56,7 +57,6 @@ set(HEADERS_CRYPTO src/crypto/c_keccak.h src/crypto/c_skein.h src/crypto/CryptoNight.h - src/crypto/CryptoNight_p.h src/crypto/CryptoNight_test.h src/crypto/groestl_tables.h src/crypto/hash.h @@ -64,6 +64,12 @@ set(HEADERS_CRYPTO src/crypto/soft_aes.h ) +if (XMRIG_ARM64) + set(HEADERS_CRYPTO "${HEADERS_CRYPTO}" src/crypto/CryptoNight_arm64.h) +else() + set(HEADERS_CRYPTO "${HEADERS_CRYPTO}" src/crypto/CryptoNight_x86.h) +endif() + set(SOURCES src/api/Api.cpp src/api/ApiState.cpp @@ -138,63 +144,13 @@ endif() add_definitions(/D__STDC_FORMAT_MACROS) add_definitions(/DUNICODE) -add_definitions(/DRAPIDJSON_SSE2) #add_definitions(/DAPP_DEBUG) set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_SOURCE_DIR}/cmake") find_package(UV REQUIRED) -if ("${CMAKE_BUILD_TYPE}" STREQUAL "") - set(CMAKE_BUILD_TYPE Release) -endif() - - -set(CMAKE_CXX_STANDARD_REQUIRED ON) -set(CMAKE_CXX_EXTENSIONS OFF) -set(CMAKE_CXX_STANDARD 11) - - -# https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_COMPILER_ID.html -if (CMAKE_CXX_COMPILER_ID MATCHES GNU) - - set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes -Wall -Wno-strict-aliasing") - set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fvariable-expansion-in-unroller -ftree-loop-if-convert-stores -fmerge-all-constants -fbranch-target-load-optimize2") - - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes -Wall -fno-exceptions -fno-rtti") - set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -s -funroll-loops -fvariable-expansion-in-unroller -ftree-loop-if-convert-stores -fmerge-all-constants -fbranch-target-load-optimize2") - - if (WIN32) - set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static") - else() - set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static-libgcc -static-libstdc++") - endif() - - add_definitions(/D_GNU_SOURCE) - - if (${CMAKE_VERSION} VERSION_LESS "3.1.0") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11") - endif() - - #set(CMAKE_C_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -gdwarf-2") - -elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC) - - set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL") - set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL") - add_definitions(/D_CRT_SECURE_NO_WARNINGS) - add_definitions(/D_CRT_NONSTDC_NO_WARNINGS) - add_definitions(/DNOMINMAX) - -elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang) - - set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes -Wall") - set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") - - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes -Wall -fno-exceptions -fno-rtti -Wno-missing-braces") - set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") - -endif() +include(cmake/flags.cmake) if (WITH_LIBCPUID) add_subdirectory(src/3rdparty/libcpuid) @@ -204,7 +160,12 @@ if (WITH_LIBCPUID) set(SOURCES_CPUID src/Cpu.cpp) else() add_definitions(/DXMRIG_NO_LIBCPUID) - set(SOURCES_CPUID src/Cpu_stub.cpp) + + if (XMRIG_ARM64) + set(SOURCES_CPUID src/Cpu_arm.cpp) + else() + set(SOURCES_CPUID src/Cpu_stub.cpp) + endif() endif() CHECK_INCLUDE_FILE (syslog.h HAVE_SYSLOG_H) diff --git a/cmake/cpu.cmake b/cmake/cpu.cmake new file mode 100644 index 00000000..56bbef96 --- /dev/null +++ b/cmake/cpu.cmake @@ -0,0 +1,16 @@ +if (NOT CMAKE_SYSTEM_PROCESSOR) + message(WARNING "CMAKE_SYSTEM_PROCESSOR not defined") +endif() + + +if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(x86_64|AMD64)$") + add_definitions(/DRAPIDJSON_SSE2) +endif() + + +if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64)$") + set(XMRIG_ARM64 ON) + set(WITH_LIBCPUID OFF) + + add_definitions(/DXMRIG_ARM) +endif() diff --git a/cmake/flags.cmake b/cmake/flags.cmake new file mode 100644 index 00000000..7f32e115 --- /dev/null +++ b/cmake/flags.cmake @@ -0,0 +1,63 @@ +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS OFF) +set(CMAKE_CXX_STANDARD 11) + +if ("${CMAKE_BUILD_TYPE}" STREQUAL "") + set(CMAKE_BUILD_TYPE Release) +endif() + +if (CMAKE_CXX_COMPILER_ID MATCHES GNU) + + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -Wno-strict-aliasing") + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fvariable-expansion-in-unroller -ftree-loop-if-convert-stores -fmerge-all-constants -fbranch-target-load-optimize2") + + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-exceptions -fno-rtti") + set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -s -funroll-loops -fvariable-expansion-in-unroller -ftree-loop-if-convert-stores -fmerge-all-constants -fbranch-target-load-optimize2") + + if (CMAKE_SYSTEM_PROCESSOR STREQUAL aarch64) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto -flax-vector-conversions") + else() + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes") + endif() + + if (WIN32) + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static") + else() + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static-libgcc -static-libstdc++") + endif() + + add_definitions(/D_GNU_SOURCE) + + if (${CMAKE_VERSION} VERSION_LESS "3.1.0") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11") + endif() + + #set(CMAKE_C_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -gdwarf-2") + +elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC) + + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL") + set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL") + add_definitions(/D_CRT_SECURE_NO_WARNINGS) + add_definitions(/D_CRT_NONSTDC_NO_WARNINGS) + add_definitions(/DNOMINMAX) + +elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang) + + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall") + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") + + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-exceptions -fno-rtti -Wno-missing-braces") + set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") + + if (CMAKE_SYSTEM_PROCESSOR STREQUAL aarch64) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto") + else() + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes") + endif() + +endif() diff --git a/src/3rdparty/aligned_malloc.h b/src/3rdparty/aligned_malloc.h new file mode 100644 index 00000000..0b74b17e --- /dev/null +++ b/src/3rdparty/aligned_malloc.h @@ -0,0 +1,65 @@ +/* XMRig + * Copyright 2010 Jeff Garzik + * Copyright 2012-2014 pooler + * Copyright 2014 Lucas Jones + * Copyright 2014-2016 Wolf9466 + * Copyright 2016 Jay D Dee + * Copyright 2016-2017 XMRig + * + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __ALIGNED_MALLOC_H__ +#define __ALIGNED_MALLOC_H__ + + +#include + + +#ifndef __cplusplus +extern int posix_memalign(void **__memptr, size_t __alignment, size_t __size); +#else +// Some systems (e.g. those with GNU libc) declare posix_memalign with an +// exception specifier. Via an "egregious workaround" in +// Sema::CheckEquivalentExceptionSpec, Clang accepts the following as a valid +// redeclaration of glibc's declaration. +extern "C" int posix_memalign(void **__memptr, size_t __alignment, size_t __size); +#endif + + +static __inline__ void *__attribute__((__always_inline__, __malloc__)) _mm_malloc(size_t __size, size_t __align) +{ + if (__align == 1) { + return malloc(__size); + } + + if (!(__align & (__align - 1)) && __align < sizeof(void *)) + __align = sizeof(void *); + + void *__mallocedMemory; + if (posix_memalign(&__mallocedMemory, __align, __size)) { + return 0; + } + + return __mallocedMemory; +} + + +static __inline__ void __attribute__((__always_inline__)) _mm_free(void *__p) +{ + free(__p); +} + +#endif /* __ALIGNED_MALLOC_H__ */ diff --git a/src/Cpu_arm.cpp b/src/Cpu_arm.cpp new file mode 100644 index 00000000..906e0156 --- /dev/null +++ b/src/Cpu_arm.cpp @@ -0,0 +1,52 @@ +/* XMRig + * Copyright 2010 Jeff Garzik + * Copyright 2012-2014 pooler + * Copyright 2014 Lucas Jones + * Copyright 2014-2016 Wolf9466 + * Copyright 2016 Jay D Dee + * Copyright 2016-2017 XMRig + * + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + + +#include + + +#include "Cpu.h" + + +char Cpu::m_brand[64] = { 0 }; +int Cpu::m_flags = 0; +int Cpu::m_l2_cache = 0; +int Cpu::m_l3_cache = 0; +int Cpu::m_sockets = 1; +int Cpu::m_totalCores = 0; +int Cpu::m_totalThreads = 0; + + +int Cpu::optimalThreadsCount(int algo, bool doubleHash, int maxCpuUsage) +{ + return m_totalThreads; +} + + +void Cpu::initCommon() +{ + memcpy(m_brand, "Unknown", 7); + + m_flags |= X86_64; + m_flags |= AES; +} diff --git a/src/Mem_unix.cpp b/src/Mem_unix.cpp index 2cb14bc9..43ffa664 100644 --- a/src/Mem_unix.cpp +++ b/src/Mem_unix.cpp @@ -23,10 +23,16 @@ #include -#include #include +#if defined(XMRIG_ARM) && !defined(__clang__) +# include "aligned_malloc.h" +#else +# include +#endif + + #include "crypto/CryptoNight.h" #include "log/Log.h" #include "Mem.h" diff --git a/src/crypto/CryptoNight.cpp b/src/crypto/CryptoNight.cpp index c4e56678..6fdf9d92 100644 --- a/src/crypto/CryptoNight.cpp +++ b/src/crypto/CryptoNight.cpp @@ -23,7 +23,13 @@ #include "crypto/CryptoNight.h" -#include "crypto/CryptoNight_p.h" + +#if defined(__aarch64__) +# include "crypto/CryptoNight_arm64.h" +#else +# include "crypto/CryptoNight_x86.h" +#endif + #include "crypto/CryptoNight_test.h" #include "net/Job.h" #include "net/JobResult.h" diff --git a/src/crypto/CryptoNight_arm64.h b/src/crypto/CryptoNight_arm64.h new file mode 100644 index 00000000..4d70b20d --- /dev/null +++ b/src/crypto/CryptoNight_arm64.h @@ -0,0 +1,458 @@ +/* XMRig + * Copyright 2010 Jeff Garzik + * Copyright 2012-2014 pooler + * Copyright 2014 Lucas Jones + * Copyright 2014-2016 Wolf9466 + * Copyright 2016 Jay D Dee + * Copyright 2016 Imran Yusuff + * Copyright 2016-2017 XMRig + * + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __CRYPTONIGHT_ARM64_H__ +#define __CRYPTONIGHT_ARM64_H__ + + +#if defined(XMRIG_ARM) && !defined(__clang__) +# include "aligned_malloc.h" +#else +# include +#endif + + +#include "crypto/CryptoNight.h" +#include "crypto/soft_aes.h" + + +extern "C" +{ +#include "crypto/c_keccak.h" +#include "crypto/c_groestl.h" +#include "crypto/c_blake256.h" +#include "crypto/c_jh.h" +#include "crypto/c_skein.h" +} + + +static inline void do_blake_hash(const void* input, size_t len, char* output) { + blake256_hash(reinterpret_cast(output), static_cast(input), len); +} + + +static inline void do_groestl_hash(const void* input, size_t len, char* output) { + groestl(static_cast(input), len * 8, reinterpret_cast(output)); +} + + +static inline void do_jh_hash(const void* input, size_t len, char* output) { + jh_hash(32 * 8, static_cast(input), 8 * len, reinterpret_cast(output)); +} + + +static inline void do_skein_hash(const void* input, size_t len, char* output) { + xmr_skein(static_cast(input), reinterpret_cast(output)); +} + + +void (* const extra_hashes[4])(const void *, size_t, char *) = {do_blake_hash, do_groestl_hash, do_jh_hash, do_skein_hash}; + + +static inline __attribute__((always_inline)) __m128i _mm_set_epi64x(const uint64_t a, const uint64_t b) +{ + return vcombine_u64(vcreate_u64(b), vcreate_u64(a)); +} + + +/* this one was not implemented yet so here it is */ +static inline __attribute__((always_inline)) uint64_t _mm_cvtsi128_si64(__m128i a) +{ + return vgetq_lane_u64(a, 0); +} + + +#define EXTRACT64(X) _mm_cvtsi128_si64(X) + + +static inline uint64_t __umul128(uint64_t a, uint64_t b, uint64_t* hi) +{ + unsigned __int128 r = (unsigned __int128) a * (unsigned __int128) b; + *hi = r >> 64; + return (uint64_t) r; +} + + +// This will shift and xor tmp1 into itself as 4 32-bit vals such as +// sl_xor(a1 a2 a3 a4) = a1 (a2^a1) (a3^a2^a1) (a4^a3^a2^a1) +static inline __m128i sl_xor(__m128i tmp1) +{ + __m128i tmp4; + tmp4 = _mm_slli_si128(tmp1, 0x04); + tmp1 = _mm_xor_si128(tmp1, tmp4); + tmp4 = _mm_slli_si128(tmp4, 0x04); + tmp1 = _mm_xor_si128(tmp1, tmp4); + tmp4 = _mm_slli_si128(tmp4, 0x04); + tmp1 = _mm_xor_si128(tmp1, tmp4); + return tmp1; +} + + +template +static inline void aes_genkey_sub(__m128i* xout0, __m128i* xout2) +{ +// __m128i xout1 = _mm_aeskeygenassist_si128(*xout2, rcon); +// xout1 = _mm_shuffle_epi32(xout1, 0xFF); // see PSHUFD, set all elems to 4th elem +// *xout0 = sl_xor(*xout0); +// *xout0 = _mm_xor_si128(*xout0, xout1); +// xout1 = _mm_aeskeygenassist_si128(*xout0, 0x00); +// xout1 = _mm_shuffle_epi32(xout1, 0xAA); // see PSHUFD, set all elems to 3rd elem +// *xout2 = sl_xor(*xout2); +// *xout2 = _mm_xor_si128(*xout2, xout1); +} + + +template +static inline void soft_aes_genkey_sub(__m128i* xout0, __m128i* xout2) +{ + __m128i xout1 = soft_aeskeygenassist(*xout2); + xout1 = _mm_shuffle_epi32(xout1, 0xFF); // see PSHUFD, set all elems to 4th elem + *xout0 = sl_xor(*xout0); + *xout0 = _mm_xor_si128(*xout0, xout1); + xout1 = soft_aeskeygenassist<0x00>(*xout0); + xout1 = _mm_shuffle_epi32(xout1, 0xAA); // see PSHUFD, set all elems to 3rd elem + *xout2 = sl_xor(*xout2); + *xout2 = _mm_xor_si128(*xout2, xout1); +} + + +template +static inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i* k2, __m128i* k3, __m128i* k4, __m128i* k5, __m128i* k6, __m128i* k7, __m128i* k8, __m128i* k9) +{ + __m128i xout0 = _mm_load_si128(memory); + __m128i xout2 = _mm_load_si128(memory + 1); + *k0 = xout0; + *k1 = xout2; + + SOFT_AES ? soft_aes_genkey_sub<0x01>(&xout0, &xout2) : soft_aes_genkey_sub<0x01>(&xout0, &xout2); + *k2 = xout0; + *k3 = xout2; + + SOFT_AES ? soft_aes_genkey_sub<0x02>(&xout0, &xout2) : soft_aes_genkey_sub<0x02>(&xout0, &xout2); + *k4 = xout0; + *k5 = xout2; + + SOFT_AES ? soft_aes_genkey_sub<0x04>(&xout0, &xout2) : soft_aes_genkey_sub<0x04>(&xout0, &xout2); + *k6 = xout0; + *k7 = xout2; + + SOFT_AES ? soft_aes_genkey_sub<0x08>(&xout0, &xout2) : soft_aes_genkey_sub<0x08>(&xout0, &xout2); + *k8 = xout0; + *k9 = xout2; +} + + +template +static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7) +{ + if (SOFT_AES) { + *x0 = soft_aesenc(*x0, key); + *x1 = soft_aesenc(*x1, key); + *x2 = soft_aesenc(*x2, key); + *x3 = soft_aesenc(*x3, key); + *x4 = soft_aesenc(*x4, key); + *x5 = soft_aesenc(*x5, key); + *x6 = soft_aesenc(*x6, key); + *x7 = soft_aesenc(*x7, key); + } + else { + *x0 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x0), key)); + *x1 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x1), key)); + *x2 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x2), key)); + *x3 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x3), key)); + *x4 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x4), key)); + *x5 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x5), key)); + *x6 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x6), key)); + *x7 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x7), key)); + } +} + + +template +static inline void cn_explode_scratchpad(const __m128i *input, __m128i *output) +{ + __m128i xin0, xin1, xin2, xin3, xin4, xin5, xin6, xin7; + __m128i k0, k1, k2, k3, k4, k5, k6, k7, k8, k9; + + aes_genkey(input, &k0, &k1, &k2, &k3, &k4, &k5, &k6, &k7, &k8, &k9); + + xin0 = _mm_load_si128(input + 4); + xin1 = _mm_load_si128(input + 5); + xin2 = _mm_load_si128(input + 6); + xin3 = _mm_load_si128(input + 7); + xin4 = _mm_load_si128(input + 8); + xin5 = _mm_load_si128(input + 9); + xin6 = _mm_load_si128(input + 10); + xin7 = _mm_load_si128(input + 11); + + for (size_t i = 0; i < MEM / sizeof(__m128i); i += 8) { + if (!SOFT_AES) { + aes_round(_mm_setzero_si128(), &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + } + + aes_round(k0, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k1, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k2, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k3, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k4, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k5, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k6, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k7, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + aes_round(k8, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + + if (!SOFT_AES) { + xin0 ^= k9; + xin1 ^= k9; + xin2 ^= k9; + xin3 ^= k9; + xin4 ^= k9; + xin5 ^= k9; + xin6 ^= k9; + xin7 ^= k9; + } + else { + aes_round(k9, &xin0, &xin1, &xin2, &xin3, &xin4, &xin5, &xin6, &xin7); + } + + _mm_store_si128(output + i + 0, xin0); + _mm_store_si128(output + i + 1, xin1); + _mm_store_si128(output + i + 2, xin2); + _mm_store_si128(output + i + 3, xin3); + _mm_store_si128(output + i + 4, xin4); + _mm_store_si128(output + i + 5, xin5); + _mm_store_si128(output + i + 6, xin6); + _mm_store_si128(output + i + 7, xin7); + } +} + + +template +static inline void cn_implode_scratchpad(const __m128i *input, __m128i *output) +{ + __m128i xout0, xout1, xout2, xout3, xout4, xout5, xout6, xout7; + __m128i k0, k1, k2, k3, k4, k5, k6, k7, k8, k9; + + aes_genkey(output + 2, &k0, &k1, &k2, &k3, &k4, &k5, &k6, &k7, &k8, &k9); + + xout0 = _mm_load_si128(output + 4); + xout1 = _mm_load_si128(output + 5); + xout2 = _mm_load_si128(output + 6); + xout3 = _mm_load_si128(output + 7); + xout4 = _mm_load_si128(output + 8); + xout5 = _mm_load_si128(output + 9); + xout6 = _mm_load_si128(output + 10); + xout7 = _mm_load_si128(output + 11); + + for (size_t i = 0; i < MEM / sizeof(__m128i); i += 8) + { + xout0 = _mm_xor_si128(_mm_load_si128(input + i + 0), xout0); + xout1 = _mm_xor_si128(_mm_load_si128(input + i + 1), xout1); + xout2 = _mm_xor_si128(_mm_load_si128(input + i + 2), xout2); + xout3 = _mm_xor_si128(_mm_load_si128(input + i + 3), xout3); + xout4 = _mm_xor_si128(_mm_load_si128(input + i + 4), xout4); + xout5 = _mm_xor_si128(_mm_load_si128(input + i + 5), xout5); + xout6 = _mm_xor_si128(_mm_load_si128(input + i + 6), xout6); + xout7 = _mm_xor_si128(_mm_load_si128(input + i + 7), xout7); + + if (!SOFT_AES) { + aes_round(_mm_setzero_si128(), &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + } + + aes_round(k0, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k1, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k2, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k3, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k4, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k5, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k6, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k7, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + aes_round(k8, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + + if (!SOFT_AES) { + xout0 ^= k9; + xout1 ^= k9; + xout2 ^= k9; + xout3 ^= k9; + xout4 ^= k9; + xout5 ^= k9; + xout6 ^= k9; + xout7 ^= k9; + } + else { + aes_round(k9, &xout0, &xout1, &xout2, &xout3, &xout4, &xout5, &xout6, &xout7); + } + } + + _mm_store_si128(output + 4, xout0); + _mm_store_si128(output + 5, xout1); + _mm_store_si128(output + 6, xout2); + _mm_store_si128(output + 7, xout3); + _mm_store_si128(output + 8, xout4); + _mm_store_si128(output + 9, xout5); + _mm_store_si128(output + 10, xout6); + _mm_store_si128(output + 11, xout7); +} + + +template +inline void cryptonight_hash(const void *__restrict__ input, size_t size, void *__restrict__ output, cryptonight_ctx *__restrict__ ctx) +{ + keccak(static_cast(input), (int) size, ctx->state0, 200); + + cn_explode_scratchpad((__m128i*) ctx->state0, (__m128i*) ctx->memory); + + const uint8_t* l0 = ctx->memory; + uint64_t* h0 = reinterpret_cast(ctx->state0); + + uint64_t al0 = h0[0] ^ h0[4]; + uint64_t ah0 = h0[1] ^ h0[5]; + __m128i bx0 = _mm_set_epi64x(h0[3] ^ h0[7], h0[2] ^ h0[6]); + + uint64_t idx0 = h0[0] ^ h0[4]; + + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + + if (SOFT_AES) { + cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); + } + else { + cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); + } + + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); + idx0 = EXTRACT64(cx); + bx0 = cx; + + uint64_t hi, lo, cl, ch; + cl = ((uint64_t*) &l0[idx0 & MASK])[0]; + ch = ((uint64_t*) &l0[idx0 & MASK])[1]; + lo = __umul128(idx0, cl, &hi); + + al0 += hi; + ah0 += lo; + + ((uint64_t*)&l0[idx0 & MASK])[0] = al0; + ((uint64_t*)&l0[idx0 & MASK])[1] = ah0; + + ah0 ^= ch; + al0 ^= cl; + idx0 = al0; + } + + cn_implode_scratchpad((__m128i*) ctx->memory, (__m128i*) ctx->state0); + + keccakf(h0, 24); + extra_hashes[ctx->state0[0] & 3](ctx->state0, 200, static_cast(output)); +} + + +template +inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, void *__restrict__ output, struct cryptonight_ctx *__restrict__ ctx) +{ + keccak((const uint8_t *) input, (int) size, ctx->state0, 200); + keccak((const uint8_t *) input + size, (int) size, ctx->state1, 200); + + const uint8_t* l0 = ctx->memory; + const uint8_t* l1 = ctx->memory + MEM; + uint64_t* h0 = reinterpret_cast(ctx->state0); + uint64_t* h1 = reinterpret_cast(ctx->state1); + + cn_explode_scratchpad((__m128i*) h0, (__m128i*) l0); + cn_explode_scratchpad((__m128i*) h1, (__m128i*) l1); + + uint64_t al0 = h0[0] ^ h0[4]; + uint64_t al1 = h1[0] ^ h1[4]; + uint64_t ah0 = h0[1] ^ h0[5]; + uint64_t ah1 = h1[1] ^ h1[5]; + + __m128i bx0 = _mm_set_epi64x(h0[3] ^ h0[7], h0[2] ^ h0[6]); + __m128i bx1 = _mm_set_epi64x(h1[3] ^ h1[7], h1[2] ^ h1[6]); + + uint64_t idx0 = h0[0] ^ h0[4]; + uint64_t idx1 = h1[0] ^ h1[4]; + + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + __m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + + if (SOFT_AES) { + cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); + } + else { + cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); + cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); + } + + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); + _mm_store_si128((__m128i *) &l1[idx1 & MASK], _mm_xor_si128(bx1, cx1)); + + idx0 = EXTRACT64(cx0); + idx1 = EXTRACT64(cx1); + + bx0 = cx0; + bx1 = cx1; + + uint64_t hi, lo, cl, ch; + cl = ((uint64_t*) &l0[idx0 & MASK])[0]; + ch = ((uint64_t*) &l0[idx0 & MASK])[1]; + lo = __umul128(idx0, cl, &hi); + + al0 += hi; + ah0 += lo; + + ((uint64_t*) &l0[idx0 & MASK])[0] = al0; + ((uint64_t*) &l0[idx0 & MASK])[1] = ah0; + + ah0 ^= ch; + al0 ^= cl; + idx0 = al0; + + cl = ((uint64_t*) &l1[idx1 & MASK])[0]; + ch = ((uint64_t*) &l1[idx1 & MASK])[1]; + lo = __umul128(idx1, cl, &hi); + + al1 += hi; + ah1 += lo; + + ((uint64_t*) &l1[idx1 & MASK])[0] = al1; + ((uint64_t*) &l1[idx1 & MASK])[1] = ah1; + + ah1 ^= ch; + al1 ^= cl; + idx1 = al1; + } + + cn_implode_scratchpad((__m128i*) l0, (__m128i*) h0); + cn_implode_scratchpad((__m128i*) l1, (__m128i*) h1); + + keccakf(h0, 24); + keccakf(h1, 24); + + extra_hashes[ctx->state0[0] & 3](ctx->state0, 200, static_cast(output)); + extra_hashes[ctx->state1[0] & 3](ctx->state1, 200, static_cast(output) + 32); +} + +#endif /* __CRYPTONIGHT_ARM64_H__ */ diff --git a/src/crypto/CryptoNight_p.h b/src/crypto/CryptoNight_x86.h similarity index 100% rename from src/crypto/CryptoNight_p.h rename to src/crypto/CryptoNight_x86.h diff --git a/src/crypto/SSE2NEON.h b/src/crypto/SSE2NEON.h new file mode 100644 index 00000000..6a00448d --- /dev/null +++ b/src/crypto/SSE2NEON.h @@ -0,0 +1,1497 @@ +#ifndef SSE2NEON_H +#define SSE2NEON_H + +// This header file provides a simple API translation layer +// between SSE intrinsics to their corresponding ARM NEON versions +// +// This header file does not (yet) translate *all* of the SSE intrinsics. +// Since this is in support of a specific porting effort, I have only +// included the intrinsics I needed to get my port to work. +// +// Questions/Comments/Feedback send to: jratcliffscarab@gmail.com +// +// If you want to improve or add to this project, send me an +// email and I will probably approve your access to the depot. +// +// Project is located here: +// +// https://github.com/jratcliff63367/sse2neon +// +// Show your appreciation for open source by sending me a bitcoin tip to the following +// address. +// +// TipJar: 1PzgWDSyq4pmdAXRH8SPUtta4SWGrt4B1p : +// https://blockchain.info/address/1PzgWDSyq4pmdAXRH8SPUtta4SWGrt4B1p +// +// +// Contributors to this project are: +// +// John W. Ratcliff : jratcliffscarab@gmail.com +// Brandon Rowlett : browlett@nvidia.com +// Ken Fast : kfast@gdeb.com +// Eric van Beurden : evanbeurden@nvidia.com +// Alexander Potylitsin : apotylitsin@nvidia.com +// +// +// ********************************************************************************************************************* +// apoty: March 17, 2017 +// Current version was changed in most to fix issues and potential issues. +// All unit tests were rewritten as a part of forge lib project to cover all implemented functions. +// ********************************************************************************************************************* +// Release notes for January 20, 2017 version: +// +// The unit tests have been refactored. They no longer assert on an error, instead they return a pass/fail condition +// The unit-tests now test 10,000 random float and int values against each intrinsic. +// +// SSE2NEON now supports 95 SSE intrinsics. 39 of them have formal unit tests which have been implemented and +// fully tested on NEON/ARM. The remaining 56 still need unit tests implemented. +// +// A struct is now defined in this header file called 'SIMDVec' which can be used by applications which +// attempt to access the contents of an _m128 struct directly. It is important to note that accessing the __m128 +// struct directly is bad coding practice by Microsoft: @see: https://msdn.microsoft.com/en-us/library/ayeb3ayc.aspx +// +// However, some legacy source code may try to access the contents of an __m128 struct directly so the developer +// can use the SIMDVec as an alias for it. Any casting must be done manually by the developer, as you cannot +// cast or otherwise alias the base NEON data type for intrinsic operations. +// +// A bug was found with the _mm_shuffle_ps intrinsic. If the shuffle permutation was not one of the ones with +// a custom/unique implementation causing it to fall through to the default shuffle implementation it was failing +// to return the correct value. This is now fixed. +// +// A bug was found with the _mm_cvtps_epi32 intrinsic. This converts floating point values to integers. +// It was not honoring the correct rounding mode. In SSE the default rounding mode when converting from float to int +// is to use 'round to even' otherwise known as 'bankers rounding'. ARMv7 did not support this feature but ARMv8 does. +// As it stands today, this header file assumes ARMv8. If you are trying to target really old ARM devices, you may get +// a build error. +// +// Support for a number of new intrinsics was added, however, none of them yet have unit-tests to 100% confirm they are +// producing the correct results on NEON. These unit tests will be added as soon as possible. +// +// Here is the list of new instrinsics which have been added: +// +// _mm_cvtss_f32 : extracts the lower order floating point value from the parameter +// _mm_add_ss : adds the scalar single - precision floating point values of a and b +// _mm_div_ps : Divides the four single - precision, floating - point values of a and b. +// _mm_div_ss : Divides the scalar single - precision floating point value of a by b. +// _mm_sqrt_ss : Computes the approximation of the square root of the scalar single - precision floating point value of in. +// _mm_rsqrt_ps : Computes the approximations of the reciprocal square roots of the four single - precision floating point values of in. +// _mm_comilt_ss : Compares the lower single - precision floating point scalar values of a and b using a less than operation +// _mm_comigt_ss : Compares the lower single - precision floating point scalar values of a and b using a greater than operation. +// _mm_comile_ss : Compares the lower single - precision floating point scalar values of a and b using a less than or equal operation. +// _mm_comige_ss : Compares the lower single - precision floating point scalar values of a and b using a greater than or equal operation. +// _mm_comieq_ss : Compares the lower single - precision floating point scalar values of a and b using an equality operation. +// _mm_comineq_s : Compares the lower single - precision floating point scalar values of a and b using an inequality operation +// _mm_unpackhi_epi8 : Interleaves the upper 8 signed or unsigned 8 - bit integers in a with the upper 8 signed or unsigned 8 - bit integers in b. +// _mm_unpackhi_epi16: Interleaves the upper 4 signed or unsigned 16 - bit integers in a with the upper 4 signed or unsigned 16 - bit integers in b. +// +// ********************************************************************************************************************* +/* +** The MIT license: +** +** Permission is hereby granted, free of charge, to any person obtaining a copy +** of this software and associated documentation files (the "Software"), to deal +** in the Software without restriction, including without limitation the rights +** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +** copies of the Software, and to permit persons to whom the Software is furnished +** to do so, subject to the following conditions: +** +** The above copyright notice and this permission notice shall be included in all +** copies or substantial portions of the Software. + +** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +** IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +** AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +** WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +** CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#define ENABLE_CPP_VERSION 0 + +#if defined(__GNUC__) || defined(__clang__) +# pragma push_macro("FORCE_INLINE") +# pragma push_macro("ALIGN_STRUCT") +# define FORCE_INLINE static inline __attribute__((always_inline)) +# define ALIGN_STRUCT(x) __attribute__((aligned(x))) +#else +# error "Macro name collisions may happens with unknown compiler" +# define FORCE_INLINE static inline +# define ALIGN_STRUCT(x) __declspec(align(x)) +#endif + +#include +#include "arm_neon.h" + + +/*******************************************************/ +/* MACRO for shuffle parameter for _mm_shuffle_ps(). */ +/* Argument fp3 is a digit[0123] that represents the fp*/ +/* from argument "b" of mm_shuffle_ps that will be */ +/* placed in fp3 of result. fp2 is the same for fp2 in */ +/* result. fp1 is a digit[0123] that represents the fp */ +/* from argument "a" of mm_shuffle_ps that will be */ +/* places in fp1 of result. fp0 is the same for fp0 of */ +/* result */ +/*******************************************************/ +#define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ + (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | ((fp0))) + +/* indicate immediate constant argument in a given range */ +#define __constrange(a,b) \ + const + +typedef float32x4_t __m128; +typedef int32x4_t __m128i; + + +// ****************************************** +// type-safe casting between types +// ****************************************** + +#define vreinterpretq_m128_f16(x) \ + vreinterpretq_f32_f16(x) + +#define vreinterpretq_m128_f32(x) \ + (x) + +#define vreinterpretq_m128_f64(x) \ + vreinterpretq_f32_f64(x) + + +#define vreinterpretq_m128_u8(x) \ + vreinterpretq_f32_u8(x) + +#define vreinterpretq_m128_u16(x) \ + vreinterpretq_f32_u16(x) + +#define vreinterpretq_m128_u32(x) \ + vreinterpretq_f32_u32(x) + +#define vreinterpretq_m128_u64(x) \ + vreinterpretq_f32_u64(x) + + +#define vreinterpretq_m128_s8(x) \ + vreinterpretq_f32_s8(x) + +#define vreinterpretq_m128_s16(x) \ + vreinterpretq_f32_s16(x) + +#define vreinterpretq_m128_s32(x) \ + vreinterpretq_f32_s32(x) + +#define vreinterpretq_m128_s64(x) \ + vreinterpretq_f32_s64(x) + + +#define vreinterpretq_f16_m128(x) \ + vreinterpretq_f16_f32(x) + +#define vreinterpretq_f32_m128(x) \ + (x) + +#define vreinterpretq_f64_m128(x) \ + vreinterpretq_f64_f32(x) + + +#define vreinterpretq_u8_m128(x) \ + vreinterpretq_u8_f32(x) + +#define vreinterpretq_u16_m128(x) \ + vreinterpretq_u16_f32(x) + +#define vreinterpretq_u32_m128(x) \ + vreinterpretq_u32_f32(x) + +#define vreinterpretq_u64_m128(x) \ + vreinterpretq_u64_f32(x) + + +#define vreinterpretq_s8_m128(x) \ + vreinterpretq_s8_f32(x) + +#define vreinterpretq_s16_m128(x) \ + vreinterpretq_s16_f32(x) + +#define vreinterpretq_s32_m128(x) \ + vreinterpretq_s32_f32(x) + +#define vreinterpretq_s64_m128(x) \ + vreinterpretq_s64_f32(x) + + +#define vreinterpretq_m128i_s8(x) \ + vreinterpretq_s32_s8(x) + +#define vreinterpretq_m128i_s16(x) \ + vreinterpretq_s32_s16(x) + +#define vreinterpretq_m128i_s32(x) \ + (x) + +#define vreinterpretq_m128i_s64(x) \ + vreinterpretq_s32_s64(x) + + +#define vreinterpretq_m128i_u8(x) \ + vreinterpretq_s32_u8(x) + +#define vreinterpretq_m128i_u16(x) \ + vreinterpretq_s32_u16(x) + +#define vreinterpretq_m128i_u32(x) \ + vreinterpretq_s32_u32(x) + +#define vreinterpretq_m128i_u64(x) \ + vreinterpretq_s32_u64(x) + + +#define vreinterpretq_s8_m128i(x) \ + vreinterpretq_s8_s32(x) + +#define vreinterpretq_s16_m128i(x) \ + vreinterpretq_s16_s32(x) + +#define vreinterpretq_s32_m128i(x) \ + (x) + +#define vreinterpretq_s64_m128i(x) \ + vreinterpretq_s64_s32(x) + + +#define vreinterpretq_u8_m128i(x) \ + vreinterpretq_u8_s32(x) + +#define vreinterpretq_u16_m128i(x) \ + vreinterpretq_u16_s32(x) + +#define vreinterpretq_u32_m128i(x) \ + vreinterpretq_u32_s32(x) + +#define vreinterpretq_u64_m128i(x) \ + vreinterpretq_u64_s32(x) + + +// union intended to allow direct access to an __m128 variable using the names that the MSVC +// compiler provides. This union should really only be used when trying to access the members +// of the vector as integer values. GCC/clang allow native access to the float members through +// a simple array access operator (in C since 4.6, in C++ since 4.8). +// +// Ideally direct accesses to SIMD vectors should not be used since it can cause a performance +// hit. If it really is needed however, the original __m128 variable can be aliased with a +// pointer to this union and used to access individual components. The use of this union should +// be hidden behind a macro that is used throughout the codebase to access the members instead +// of always declaring this type of variable. +typedef union ALIGN_STRUCT(16) SIMDVec +{ + float m128_f32[4]; // as floats - do not to use this. Added for convenience. + int8_t m128_i8[16]; // as signed 8-bit integers. + int16_t m128_i16[8]; // as signed 16-bit integers. + int32_t m128_i32[4]; // as signed 32-bit integers. + int64_t m128_i64[2]; // as signed 64-bit integers. + uint8_t m128_u8[16]; // as unsigned 8-bit integers. + uint16_t m128_u16[8]; // as unsigned 16-bit integers. + uint32_t m128_u32[4]; // as unsigned 32-bit integers. + uint64_t m128_u64[2]; // as unsigned 64-bit integers. +} SIMDVec; + + +// ****************************************** +// Set/get methods +// ****************************************** + +// extracts the lower order floating point value from the parameter : https://msdn.microsoft.com/en-us/library/bb514059%28v=vs.120%29.aspx?f=255&MSPPError=-2147217396 +FORCE_INLINE float _mm_cvtss_f32(__m128 a) +{ + return vgetq_lane_f32(vreinterpretq_f32_m128(a), 0); +} + +// Sets the 128-bit value to zero https://msdn.microsoft.com/en-us/library/vstudio/ys7dw0kh(v=vs.100).aspx +FORCE_INLINE __m128i _mm_setzero_si128() +{ + return vreinterpretq_m128i_s32(vdupq_n_s32(0)); +} + +// Clears the four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/vstudio/tk1t2tbz(v=vs.100).aspx +FORCE_INLINE __m128 _mm_setzero_ps(void) +{ + return vreinterpretq_m128_f32(vdupq_n_f32(0)); +} + +// Sets the four single-precision, floating-point values to w. https://msdn.microsoft.com/en-us/library/vstudio/2x1se8ha(v=vs.100).aspx +FORCE_INLINE __m128 _mm_set1_ps(float _w) +{ + return vreinterpretq_m128_f32(vdupq_n_f32(_w)); +} + +// Sets the four single-precision, floating-point values to w. https://msdn.microsoft.com/en-us/library/vstudio/2x1se8ha(v=vs.100).aspx +FORCE_INLINE __m128 _mm_set_ps1(float _w) +{ + return vreinterpretq_m128_f32(vdupq_n_f32(_w)); +} + +// Sets the four single-precision, floating-point values to the four inputs. https://msdn.microsoft.com/en-us/library/vstudio/afh0zf75(v=vs.100).aspx +FORCE_INLINE __m128 _mm_set_ps(float w, float z, float y, float x) +{ + float __attribute__((aligned(16))) data[4] = { x, y, z, w }; + return vreinterpretq_m128_f32(vld1q_f32(data)); +} + +// Sets the four single-precision, floating-point values to the four inputs in reverse order. https://msdn.microsoft.com/en-us/library/vstudio/d2172ct3(v=vs.100).aspx +FORCE_INLINE __m128 _mm_setr_ps(float w, float z , float y , float x ) +{ + float __attribute__ ((aligned (16))) data[4] = { w, z, y, x }; + return vreinterpretq_m128_f32(vld1q_f32(data)); +} + +// Sets the 4 signed 32-bit integer values to i. https://msdn.microsoft.com/en-us/library/vstudio/h4xscxat(v=vs.100).aspx +FORCE_INLINE __m128i _mm_set1_epi32(int _i) +{ + return vreinterpretq_m128i_s32(vdupq_n_s32(_i)); +} + +// Sets the 4 signed 32-bit integer values. https://msdn.microsoft.com/en-us/library/vstudio/019beekt(v=vs.100).aspx +FORCE_INLINE __m128i _mm_set_epi32(int i3, int i2, int i1, int i0) +{ + int32_t __attribute__((aligned(16))) data[4] = { i0, i1, i2, i3 }; + return vreinterpretq_m128i_s32(vld1q_s32(data)); +} + +// Stores four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/vstudio/s3h4ay6y(v=vs.100).aspx +FORCE_INLINE void _mm_store_ps(float *p, __m128 a) +{ + vst1q_f32(p, vreinterpretq_f32_m128(a)); +} + +// Stores four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/44e30x22(v=vs.100).aspx +FORCE_INLINE void _mm_storeu_ps(float *p, __m128 a) +{ + vst1q_f32(p, vreinterpretq_f32_m128(a)); +} + +// Stores four 32-bit integer values as (as a __m128i value) at the address p. https://msdn.microsoft.com/en-us/library/vstudio/edk11s13(v=vs.100).aspx +FORCE_INLINE void _mm_store_si128(__m128i *p, __m128i a) +{ + vst1q_s32((int32_t*) p, vreinterpretq_s32_m128i(a)); +} + +// Stores the lower single - precision, floating - point value. https://msdn.microsoft.com/en-us/library/tzz10fbx(v=vs.100).aspx +FORCE_INLINE void _mm_store_ss(float *p, __m128 a) +{ + vst1q_lane_f32(p, vreinterpretq_f32_m128(a), 0); +} + +// Reads the lower 64 bits of b and stores them into the lower 64 bits of a. https://msdn.microsoft.com/en-us/library/hhwf428f%28v=vs.90%29.aspx +FORCE_INLINE void _mm_storel_epi64(__m128i* a, __m128i b) +{ + uint64x1_t hi = vget_high_u64(vreinterpretq_u64_m128i(*a)); + uint64x1_t lo = vget_low_u64(vreinterpretq_u64_m128i(b)); + *a = vreinterpretq_m128i_u64(vcombine_u64(lo, hi)); +} + +// Loads a single single-precision, floating-point value, copying it into all four words https://msdn.microsoft.com/en-us/library/vstudio/5cdkf716(v=vs.100).aspx +FORCE_INLINE __m128 _mm_load1_ps(const float * p) +{ + return vreinterpretq_m128_f32(vld1q_dup_f32(p)); +} + +// Loads four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/vstudio/zzd50xxt(v=vs.100).aspx +FORCE_INLINE __m128 _mm_load_ps(const float * p) +{ + return vreinterpretq_m128_f32(vld1q_f32(p)); +} + +// Loads four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/x1b16s7z%28v=vs.90%29.aspx +FORCE_INLINE __m128 _mm_loadu_ps(const float * p) +{ + // for neon, alignment doesn't matter, so _mm_load_ps and _mm_loadu_ps are equivalent for neon + return vreinterpretq_m128_f32(vld1q_f32(p)); +} + +// Loads an single - precision, floating - point value into the low word and clears the upper three words. https://msdn.microsoft.com/en-us/library/548bb9h4%28v=vs.90%29.aspx +FORCE_INLINE __m128 _mm_load_ss(const float * p) +{ + return vreinterpretq_m128_f32(vsetq_lane_f32(*p, vdupq_n_f32(0), 0)); +} + + +// ****************************************** +// Logic/Binary operations +// ****************************************** + +// Compares for inequality. https://msdn.microsoft.com/en-us/library/sf44thbx(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmpneq_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32( vmvnq_u32( vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)) ) ); +} + +// Computes the bitwise AND-NOT of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/68h7wd02(v=vs.100).aspx +FORCE_INLINE __m128 _mm_andnot_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_s32( vbicq_s32(vreinterpretq_s32_m128(b), vreinterpretq_s32_m128(a)) ); // *NOTE* argument swap +} + +// Computes the bitwise AND of the 128-bit value in b and the bitwise NOT of the 128-bit value in a. https://msdn.microsoft.com/en-us/library/vstudio/1beaceh8(v=vs.100).aspx +FORCE_INLINE __m128i _mm_andnot_si128(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32( vbicq_s32(vreinterpretq_s32_m128i(b), vreinterpretq_s32_m128i(a)) ); // *NOTE* argument swap +} + +// Computes the bitwise AND of the 128-bit value in a and the 128-bit value in b. https://msdn.microsoft.com/en-us/library/vstudio/6d1txsa8(v=vs.100).aspx +FORCE_INLINE __m128i _mm_and_si128(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32( vandq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b)) ); +} + +// Computes the bitwise AND of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/73ck1xc5(v=vs.100).aspx +FORCE_INLINE __m128 _mm_and_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_s32( vandq_s32(vreinterpretq_s32_m128(a), vreinterpretq_s32_m128(b)) ); +} + +// Computes the bitwise OR of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/7ctdsyy0(v=vs.100).aspx +FORCE_INLINE __m128 _mm_or_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_s32( vorrq_s32(vreinterpretq_s32_m128(a), vreinterpretq_s32_m128(b)) ); +} + +// Computes bitwise EXOR (exclusive-or) of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/ss6k3wk8(v=vs.100).aspx +FORCE_INLINE __m128 _mm_xor_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_s32( veorq_s32(vreinterpretq_s32_m128(a), vreinterpretq_s32_m128(b)) ); +} + +// Computes the bitwise OR of the 128-bit value in a and the 128-bit value in b. https://msdn.microsoft.com/en-us/library/vstudio/ew8ty0db(v=vs.100).aspx +FORCE_INLINE __m128i _mm_or_si128(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32( vorrq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b)) ); +} + +// Computes the bitwise XOR of the 128-bit value in a and the 128-bit value in b. https://msdn.microsoft.com/en-us/library/fzt08www(v=vs.100).aspx +FORCE_INLINE __m128i _mm_xor_si128(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32( veorq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b)) ); +} + +// NEON does not provide this method +// Creates a 4-bit mask from the most significant bits of the four single-precision, floating-point values. https://msdn.microsoft.com/en-us/library/vstudio/4490ys29(v=vs.100).aspx +FORCE_INLINE int _mm_movemask_ps(__m128 a) +{ +#if ENABLE_CPP_VERSION // I am not yet convinced that the NEON version is faster than the C version of this + uint32x4_t &ia = *(uint32x4_t *)&a; + return (ia[0] >> 31) | ((ia[1] >> 30) & 2) | ((ia[2] >> 29) & 4) | ((ia[3] >> 28) & 8); +#else + static const uint32x4_t movemask = { 1, 2, 4, 8 }; + static const uint32x4_t highbit = { 0x80000000, 0x80000000, 0x80000000, 0x80000000 }; + uint32x4_t t0 = vreinterpretq_u32_m128(a); + uint32x4_t t1 = vtstq_u32(t0, highbit); + uint32x4_t t2 = vandq_u32(t1, movemask); + uint32x2_t t3 = vorr_u32(vget_low_u32(t2), vget_high_u32(t2)); + return vget_lane_u32(t3, 0) | vget_lane_u32(t3, 1); +#endif +} + +// Takes the upper 64 bits of a and places it in the low end of the result +// Takes the lower 64 bits of b and places it into the high end of the result. +FORCE_INLINE __m128 _mm_shuffle_ps_1032(__m128 a, __m128 b) +{ + float32x2_t a32 = vget_high_f32(vreinterpretq_f32_m128(a)); + float32x2_t b10 = vget_low_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(a32, b10)); +} + +// takes the lower two 32-bit values from a and swaps them and places in high end of result +// takes the higher two 32 bit values from b and swaps them and places in low end of result. +FORCE_INLINE __m128 _mm_shuffle_ps_2301(__m128 a, __m128 b) +{ + float32x2_t a01 = vrev64_f32(vget_low_f32(vreinterpretq_f32_m128(a))); + float32x2_t b23 = vrev64_f32(vget_high_f32(vreinterpretq_f32_m128(b))); + return vreinterpretq_m128_f32(vcombine_f32(a01, b23)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_0321(__m128 a, __m128 b) +{ + float32x2_t a21 = vget_high_f32(vextq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a), 3)); + float32x2_t b03 = vget_low_f32(vextq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b), 3)); + return vreinterpretq_m128_f32(vcombine_f32(a21, b03)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_2103(__m128 a, __m128 b) +{ + float32x2_t a03 = vget_low_f32(vextq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a), 3)); + float32x2_t b21 = vget_high_f32(vextq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b), 3)); + return vreinterpretq_m128_f32(vcombine_f32(a03, b21)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_1010(__m128 a, __m128 b) +{ + float32x2_t a10 = vget_low_f32(vreinterpretq_f32_m128(a)); + float32x2_t b10 = vget_low_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(a10, b10)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_1001(__m128 a, __m128 b) +{ + float32x2_t a01 = vrev64_f32(vget_low_f32(vreinterpretq_f32_m128(a))); + float32x2_t b10 = vget_low_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(a01, b10)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_0101(__m128 a, __m128 b) +{ + float32x2_t a01 = vrev64_f32(vget_low_f32(vreinterpretq_f32_m128(a))); + float32x2_t b01 = vrev64_f32(vget_low_f32(vreinterpretq_f32_m128(b))); + return vreinterpretq_m128_f32(vcombine_f32(a01, b01)); +} + +// keeps the low 64 bits of b in the low and puts the high 64 bits of a in the high +FORCE_INLINE __m128 _mm_shuffle_ps_3210(__m128 a, __m128 b) +{ + float32x2_t a10 = vget_low_f32(vreinterpretq_f32_m128(a)); + float32x2_t b32 = vget_high_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(a10, b32)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_0011(__m128 a, __m128 b) +{ + float32x2_t a11 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(a)), 1); + float32x2_t b00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 0); + return vreinterpretq_m128_f32(vcombine_f32(a11, b00)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_0022(__m128 a, __m128 b) +{ + float32x2_t a22 = vdup_lane_f32(vget_high_f32(vreinterpretq_f32_m128(a)), 0); + float32x2_t b00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 0); + return vreinterpretq_m128_f32(vcombine_f32(a22, b00)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_2200(__m128 a, __m128 b) +{ + float32x2_t a00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(a)), 0); + float32x2_t b22 = vdup_lane_f32(vget_high_f32(vreinterpretq_f32_m128(b)), 0); + return vreinterpretq_m128_f32(vcombine_f32(a00, b22)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_3202(__m128 a, __m128 b) +{ + float32_t a0 = vgetq_lane_f32(vreinterpretq_f32_m128(a), 0); + float32x2_t a22 = vdup_lane_f32(vget_high_f32(vreinterpretq_f32_m128(a)), 0); + float32x2_t a02 = vset_lane_f32(a0, a22, 1); /* apoty: TODO: use vzip ?*/ + float32x2_t b32 = vget_high_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(a02, b32)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_1133(__m128 a, __m128 b) +{ + float32x2_t a33 = vdup_lane_f32(vget_high_f32(vreinterpretq_f32_m128(a)), 1); + float32x2_t b11 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 1); + return vreinterpretq_m128_f32(vcombine_f32(a33, b11)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_2010(__m128 a, __m128 b) +{ + float32x2_t a10 = vget_low_f32(vreinterpretq_f32_m128(a)); + float32_t b2 = vgetq_lane_f32(vreinterpretq_f32_m128(b), 2); + float32x2_t b00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 0); + float32x2_t b20 = vset_lane_f32(b2, b00, 1); + return vreinterpretq_m128_f32(vcombine_f32(a10, b20)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_2001(__m128 a, __m128 b) +{ + float32x2_t a01 = vrev64_f32(vget_low_f32(vreinterpretq_f32_m128(a))); + float32_t b2 = vgetq_lane_f32(b, 2); + float32x2_t b00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 0); + float32x2_t b20 = vset_lane_f32(b2, b00, 1); + return vreinterpretq_m128_f32(vcombine_f32(a01, b20)); +} + +FORCE_INLINE __m128 _mm_shuffle_ps_2032(__m128 a, __m128 b) +{ + float32x2_t a32 = vget_high_f32(vreinterpretq_f32_m128(a)); + float32_t b2 = vgetq_lane_f32(b, 2); + float32x2_t b00 = vdup_lane_f32(vget_low_f32(vreinterpretq_f32_m128(b)), 0); + float32x2_t b20 = vset_lane_f32(b2, b00, 1); + return vreinterpretq_m128_f32(vcombine_f32(a32, b20)); +} + +// NEON does not support a general purpose permute intrinsic +// Currently I am not sure whether the C implementation is faster or slower than the NEON version. +// Note, this has to be expanded as a template because the shuffle value must be an immediate value. +// The same is true on SSE as well. +// Selects four specific single-precision, floating-point values from a and b, based on the mask i. https://msdn.microsoft.com/en-us/library/vstudio/5f0858x0(v=vs.100).aspx +#if ENABLE_CPP_VERSION // I am not convinced that the NEON version is faster than the C version yet. +FORCE_INLINE __m128 _mm_shuffle_ps_default(__m128 a, __m128 b, __constrange(0,255) int imm) +{ + __m128 ret; + ret[0] = a[imm & 0x3]; + ret[1] = a[(imm >> 2) & 0x3]; + ret[2] = b[(imm >> 4) & 0x03]; + ret[3] = b[(imm >> 6) & 0x03]; + return ret; +} +#else +#define _mm_shuffle_ps_default(a, b, imm) \ +({ \ + float32x4_t ret; \ + ret = vmovq_n_f32(vgetq_lane_f32(vreinterpretq_f32_m128(a), (imm) & 0x3)); \ + ret = vsetq_lane_f32(vgetq_lane_f32(vreinterpretq_f32_m128(a), ((imm) >> 2) & 0x3), ret, 1); \ + ret = vsetq_lane_f32(vgetq_lane_f32(vreinterpretq_f32_m128(b), ((imm) >> 4) & 0x3), ret, 2); \ + ret = vsetq_lane_f32(vgetq_lane_f32(vreinterpretq_f32_m128(b), ((imm) >> 6) & 0x3), ret, 3); \ + vreinterpretq_m128_f32(ret); \ +}) +#endif + +//FORCE_INLINE __m128 _mm_shuffle_ps(__m128 a, __m128 b, __constrange(0,255) int imm) +#define _mm_shuffle_ps(a, b, imm) \ +({ \ + __m128 ret; \ + switch (imm) \ + { \ + case _MM_SHUFFLE(1, 0, 3, 2): ret = _mm_shuffle_ps_1032((a), (b)); break; \ + case _MM_SHUFFLE(2, 3, 0, 1): ret = _mm_shuffle_ps_2301((a), (b)); break; \ + case _MM_SHUFFLE(0, 3, 2, 1): ret = _mm_shuffle_ps_0321((a), (b)); break; \ + case _MM_SHUFFLE(2, 1, 0, 3): ret = _mm_shuffle_ps_2103((a), (b)); break; \ + case _MM_SHUFFLE(1, 0, 1, 0): ret = _mm_shuffle_ps_1010((a), (b)); break; \ + case _MM_SHUFFLE(1, 0, 0, 1): ret = _mm_shuffle_ps_1001((a), (b)); break; \ + case _MM_SHUFFLE(0, 1, 0, 1): ret = _mm_shuffle_ps_0101((a), (b)); break; \ + case _MM_SHUFFLE(3, 2, 1, 0): ret = _mm_shuffle_ps_3210((a), (b)); break; \ + case _MM_SHUFFLE(0, 0, 1, 1): ret = _mm_shuffle_ps_0011((a), (b)); break; \ + case _MM_SHUFFLE(0, 0, 2, 2): ret = _mm_shuffle_ps_0022((a), (b)); break; \ + case _MM_SHUFFLE(2, 2, 0, 0): ret = _mm_shuffle_ps_2200((a), (b)); break; \ + case _MM_SHUFFLE(3, 2, 0, 2): ret = _mm_shuffle_ps_3202((a), (b)); break; \ + case _MM_SHUFFLE(1, 1, 3, 3): ret = _mm_shuffle_ps_1133((a), (b)); break; \ + case _MM_SHUFFLE(2, 0, 1, 0): ret = _mm_shuffle_ps_2010((a), (b)); break; \ + case _MM_SHUFFLE(2, 0, 0, 1): ret = _mm_shuffle_ps_2001((a), (b)); break; \ + case _MM_SHUFFLE(2, 0, 3, 2): ret = _mm_shuffle_ps_2032((a), (b)); break; \ + default: ret = _mm_shuffle_ps_default((a), (b), (imm)); break; \ + } \ + ret; \ +}) + +// Takes the upper 64 bits of a and places it in the low end of the result +// Takes the lower 64 bits of a and places it into the high end of the result. +FORCE_INLINE __m128i _mm_shuffle_epi_1032(__m128i a) +{ + int32x2_t a32 = vget_high_s32(vreinterpretq_s32_m128i(a)); + int32x2_t a10 = vget_low_s32(vreinterpretq_s32_m128i(a)); + return vreinterpretq_m128i_s32(vcombine_s32(a32, a10)); +} + +// takes the lower two 32-bit values from a and swaps them and places in low end of result +// takes the higher two 32 bit values from a and swaps them and places in high end of result. +FORCE_INLINE __m128i _mm_shuffle_epi_2301(__m128i a) +{ + int32x2_t a01 = vrev64_s32(vget_low_s32(vreinterpretq_s32_m128i(a))); + int32x2_t a23 = vrev64_s32(vget_high_s32(vreinterpretq_s32_m128i(a))); + return vreinterpretq_m128i_s32(vcombine_s32(a01, a23)); +} + +// rotates the least significant 32 bits into the most signficant 32 bits, and shifts the rest down +FORCE_INLINE __m128i _mm_shuffle_epi_0321(__m128i a) +{ + return vreinterpretq_m128i_s32(vextq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(a), 1)); +} + +// rotates the most significant 32 bits into the least signficant 32 bits, and shifts the rest up +FORCE_INLINE __m128i _mm_shuffle_epi_2103(__m128i a) +{ + return vreinterpretq_m128i_s32(vextq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(a), 3)); +} + +// gets the lower 64 bits of a, and places it in the upper 64 bits +// gets the lower 64 bits of a and places it in the lower 64 bits +FORCE_INLINE __m128i _mm_shuffle_epi_1010(__m128i a) +{ + int32x2_t a10 = vget_low_s32(vreinterpretq_s32_m128i(a)); + return vreinterpretq_m128i_s32(vcombine_s32(a10, a10)); +} + +// gets the lower 64 bits of a, swaps the 0 and 1 elements, and places it in the lower 64 bits +// gets the lower 64 bits of a, and places it in the upper 64 bits +FORCE_INLINE __m128i _mm_shuffle_epi_1001(__m128i a) +{ + int32x2_t a01 = vrev64_s32(vget_low_s32(vreinterpretq_s32_m128i(a))); + int32x2_t a10 = vget_low_s32(vreinterpretq_s32_m128i(a)); + return vreinterpretq_m128i_s32(vcombine_s32(a01, a10)); +} + +// gets the lower 64 bits of a, swaps the 0 and 1 elements and places it in the upper 64 bits +// gets the lower 64 bits of a, swaps the 0 and 1 elements, and places it in the lower 64 bits +FORCE_INLINE __m128i _mm_shuffle_epi_0101(__m128i a) +{ + int32x2_t a01 = vrev64_s32(vget_low_s32(vreinterpretq_s32_m128i(a))); + return vreinterpretq_m128i_s32(vcombine_s32(a01, a01)); +} + +FORCE_INLINE __m128i _mm_shuffle_epi_2211(__m128i a) +{ + int32x2_t a11 = vdup_lane_s32(vget_low_s32(vreinterpretq_s32_m128i(a)), 1); + int32x2_t a22 = vdup_lane_s32(vget_high_s32(vreinterpretq_s32_m128i(a)), 0); + return vreinterpretq_m128i_s32(vcombine_s32(a11, a22)); +} + +FORCE_INLINE __m128i _mm_shuffle_epi_0122(__m128i a) +{ + int32x2_t a22 = vdup_lane_s32(vget_high_s32(vreinterpretq_s32_m128i(a)), 0); + int32x2_t a01 = vrev64_s32(vget_low_s32(vreinterpretq_s32_m128i(a))); + return vreinterpretq_m128i_s32(vcombine_s32(a22, a01)); +} + +FORCE_INLINE __m128i _mm_shuffle_epi_3332(__m128i a) +{ + int32x2_t a32 = vget_high_s32(vreinterpretq_s32_m128i(a)); + int32x2_t a33 = vdup_lane_s32(vget_high_s32(vreinterpretq_s32_m128i(a)), 1); + return vreinterpretq_m128i_s32(vcombine_s32(a32, a33)); +} + +//FORCE_INLINE __m128i _mm_shuffle_epi32_default(__m128i a, __constrange(0,255) int imm) +#if ENABLE_CPP_VERSION +FORCE_INLINE __m128i _mm_shuffle_epi32_default(__m128i a, __constrange(0,255) int imm) +{ + __m128i ret; + ret[0] = a[imm & 0x3]; + ret[1] = a[(imm >> 2) & 0x3]; + ret[2] = a[(imm >> 4) & 0x03]; + ret[3] = a[(imm >> 6) & 0x03]; + return ret; +} +#else +#define _mm_shuffle_epi32_default(a, imm) \ +({ \ + int32x4_t ret; \ + ret = vmovq_n_s32(vgetq_lane_s32(vreinterpretq_s32_m128i(a), (imm) & 0x3)); \ + ret = vsetq_lane_s32(vgetq_lane_s32(vreinterpretq_s32_m128i(a), ((imm) >> 2) & 0x3), ret, 1); \ + ret = vsetq_lane_s32(vgetq_lane_s32(vreinterpretq_s32_m128i(a), ((imm) >> 4) & 0x3), ret, 2); \ + ret = vsetq_lane_s32(vgetq_lane_s32(vreinterpretq_s32_m128i(a), ((imm) >> 6) & 0x3), ret, 3); \ + vreinterpretq_m128i_s32(ret); \ +}) +#endif + +//FORCE_INLINE __m128i _mm_shuffle_epi32_splat(__m128i a, __constrange(0,255) int imm) +#if defined(__aarch64__) +#define _mm_shuffle_epi32_splat(a, imm) \ +({ \ + vreinterpretq_m128i_s32(vdupq_laneq_s32(vreinterpretq_s32_m128i(a), (imm))); \ +}) +#else +#define _mm_shuffle_epi32_splat(a, imm) \ +({ \ + vreinterpretq_m128i_s32(vdupq_n_s32(vgetq_lane_s32(vreinterpretq_s32_m128i(a), (imm)))); \ +}) +#endif + +// Shuffles the 4 signed or unsigned 32-bit integers in a as specified by imm. https://msdn.microsoft.com/en-us/library/56f67xbk%28v=vs.90%29.aspx +//FORCE_INLINE __m128i _mm_shuffle_epi32(__m128i a, __constrange(0,255) int imm) +#define _mm_shuffle_epi32(a, imm) \ +({ \ + __m128i ret; \ + switch (imm) \ + { \ + case _MM_SHUFFLE(1, 0, 3, 2): ret = _mm_shuffle_epi_1032((a)); break; \ + case _MM_SHUFFLE(2, 3, 0, 1): ret = _mm_shuffle_epi_2301((a)); break; \ + case _MM_SHUFFLE(0, 3, 2, 1): ret = _mm_shuffle_epi_0321((a)); break; \ + case _MM_SHUFFLE(2, 1, 0, 3): ret = _mm_shuffle_epi_2103((a)); break; \ + case _MM_SHUFFLE(1, 0, 1, 0): ret = _mm_shuffle_epi_1010((a)); break; \ + case _MM_SHUFFLE(1, 0, 0, 1): ret = _mm_shuffle_epi_1001((a)); break; \ + case _MM_SHUFFLE(0, 1, 0, 1): ret = _mm_shuffle_epi_0101((a)); break; \ + case _MM_SHUFFLE(2, 2, 1, 1): ret = _mm_shuffle_epi_2211((a)); break; \ + case _MM_SHUFFLE(0, 1, 2, 2): ret = _mm_shuffle_epi_0122((a)); break; \ + case _MM_SHUFFLE(3, 3, 3, 2): ret = _mm_shuffle_epi_3332((a)); break; \ + case _MM_SHUFFLE(0, 0, 0, 0): ret = _mm_shuffle_epi32_splat((a),0); break; \ + case _MM_SHUFFLE(1, 1, 1, 1): ret = _mm_shuffle_epi32_splat((a),1); break; \ + case _MM_SHUFFLE(2, 2, 2, 2): ret = _mm_shuffle_epi32_splat((a),2); break; \ + case _MM_SHUFFLE(3, 3, 3, 3): ret = _mm_shuffle_epi32_splat((a),3); break; \ + default: ret = _mm_shuffle_epi32_default((a), (imm)); break; \ + } \ + ret; \ +}) + +// Shuffles the upper 4 signed or unsigned 16 - bit integers in a as specified by imm. https://msdn.microsoft.com/en-us/library/13ywktbs(v=vs.100).aspx +//FORCE_INLINE __m128i _mm_shufflehi_epi16_function(__m128i a, __constrange(0,255) int imm) +#define _mm_shufflehi_epi16_function(a, imm) \ +({ \ + int16x8_t ret = vreinterpretq_s16_s32(a); \ + int16x4_t highBits = vget_high_s16(ret); \ + ret = vsetq_lane_s16(vget_lane_s16(highBits, (imm) & 0x3), ret, 4); \ + ret = vsetq_lane_s16(vget_lane_s16(highBits, ((imm) >> 2) & 0x3), ret, 5); \ + ret = vsetq_lane_s16(vget_lane_s16(highBits, ((imm) >> 4) & 0x3), ret, 6); \ + ret = vsetq_lane_s16(vget_lane_s16(highBits, ((imm) >> 6) & 0x3), ret, 7); \ + vreinterpretq_s32_s16(ret); \ +}) + +//FORCE_INLINE __m128i _mm_shufflehi_epi16(__m128i a, __constrange(0,255) int imm) +#define _mm_shufflehi_epi16(a, imm) \ + _mm_shufflehi_epi16_function((a), (imm)) + + +// Shifts the 4 signed or unsigned 32-bit integers in a left by count bits while shifting in zeros. : https://msdn.microsoft.com/en-us/library/z2k3bbtb%28v=vs.90%29.aspx +//FORCE_INLINE __m128i _mm_slli_epi32(__m128i a, __constrange(0,255) int imm) +#define _mm_slli_epi32(a, imm) \ +({ \ + __m128i ret; \ + if ((imm) <= 0) {\ + ret = a; \ + } \ + else if ((imm) > 31) { \ + ret = _mm_setzero_si128(); \ + } \ + else { \ + ret = vreinterpretq_m128i_s32(vshlq_n_s32(vreinterpretq_s32_m128i(a), (imm))); \ + } \ + ret; \ +}) + +//Shifts the 4 signed or unsigned 32-bit integers in a right by count bits while shifting in zeros. https://msdn.microsoft.com/en-us/library/w486zcfa(v=vs.100).aspx +//FORCE_INLINE __m128i _mm_srli_epi32(__m128i a, __constrange(0,255) int imm) +#define _mm_srli_epi32(a, imm) \ +({ \ + __m128i ret; \ + if ((imm) <= 0) { \ + ret = a; \ + } \ + else if ((imm)> 31) { \ + ret = _mm_setzero_si128(); \ + } \ + else { \ + ret = vreinterpretq_m128i_u32(vshrq_n_u32(vreinterpretq_u32_m128i(a), (imm))); \ + } \ + ret; \ +}) + +// Shifts the 4 signed 32 - bit integers in a right by count bits while shifting in the sign bit. https://msdn.microsoft.com/en-us/library/z1939387(v=vs.100).aspx +//FORCE_INLINE __m128i _mm_srai_epi32(__m128i a, __constrange(0,255) int imm) +#define _mm_srai_epi32(a, imm) \ +({ \ + __m128i ret; \ + if ((imm) <= 0) { \ + ret = a; \ + } \ + else if ((imm) > 31) { \ + ret = vreinterpretq_m128i_s32(vshrq_n_s32(vreinterpretq_s32_m128i(a), 16)); \ + ret = vreinterpretq_m128i_s32(vshrq_n_s32(vreinterpretq_s32_m128i(ret), 16)); \ + } \ + else { \ + ret = vreinterpretq_m128i_s32(vshrq_n_s32(vreinterpretq_s32_m128i(a), (imm))); \ + } \ + ret; \ +}) + +// Shifts the 128 - bit value in a right by imm bytes while shifting in zeros.imm must be an immediate. https://msdn.microsoft.com/en-us/library/305w28yz(v=vs.100).aspx +//FORCE_INLINE _mm_srli_si128(__m128i a, __constrange(0,255) int imm) +#define _mm_srli_si128(a, imm) \ +({ \ + __m128i ret; \ + if ((imm) <= 0) { \ + ret = a; \ + } \ + else if ((imm) > 15) { \ + ret = _mm_setzero_si128(); \ + } \ + else { \ + ret = vreinterpretq_m128i_s8(vextq_s8(vreinterpretq_s8_m128i(a), vdupq_n_s8(0), (imm))); \ + } \ + ret; \ +}) + +// Shifts the 128-bit value in a left by imm bytes while shifting in zeros. imm must be an immediate. https://msdn.microsoft.com/en-us/library/34d3k2kt(v=vs.100).aspx +//FORCE_INLINE __m128i _mm_slli_si128(__m128i a, __constrange(0,255) int imm) +#define _mm_slli_si128(a, imm) \ +({ \ + __m128i ret; \ + if ((imm) <= 0) { \ + ret = a; \ + } \ + else if ((imm) > 15) { \ + ret = _mm_setzero_si128(); \ + } \ + else { \ + ret = vreinterpretq_m128i_s8(vextq_s8(vdupq_n_s8(0), vreinterpretq_s8_m128i(a), 16 - (imm))); \ + } \ + ret; \ +}) + +// NEON does not provide a version of this function, here is an article about some ways to repro the results. +// http://stackoverflow.com/questions/11870910/sse-mm-movemask-epi8-equivalent-method-for-arm-neon +// Creates a 16-bit mask from the most significant bits of the 16 signed or unsigned 8-bit integers in a and zero extends the upper bits. https://msdn.microsoft.com/en-us/library/vstudio/s090c8fk(v=vs.100).aspx +FORCE_INLINE int _mm_movemask_epi8(__m128i _a) +{ + uint8x16_t input = vreinterpretq_u8_m128i(_a); + static const int8_t __attribute__((aligned(16))) xr[8] = { -7, -6, -5, -4, -3, -2, -1, 0 }; + uint8x8_t mask_and = vdup_n_u8(0x80); + int8x8_t mask_shift = vld1_s8(xr); + + uint8x8_t lo = vget_low_u8(input); + uint8x8_t hi = vget_high_u8(input); + + lo = vand_u8(lo, mask_and); + lo = vshl_u8(lo, mask_shift); + + hi = vand_u8(hi, mask_and); + hi = vshl_u8(hi, mask_shift); + + lo = vpadd_u8(lo, lo); + lo = vpadd_u8(lo, lo); + lo = vpadd_u8(lo, lo); + + hi = vpadd_u8(hi, hi); + hi = vpadd_u8(hi, hi); + hi = vpadd_u8(hi, hi); + + return ((hi[0] << 8) | (lo[0] & 0xFF)); +} + + +// ****************************************** +// Math operations +// ****************************************** + +// Subtracts the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/1zad2k61(v=vs.100).aspx +FORCE_INLINE __m128 _mm_sub_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_f32(vsubq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Subtracts the 4 signed or unsigned 32-bit integers of b from the 4 signed or unsigned 32-bit integers of a. https://msdn.microsoft.com/en-us/library/vstudio/fhh866h0(v=vs.100).aspx +FORCE_INLINE __m128i _mm_sub_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128_f32(vsubq_s32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +FORCE_INLINE __m128i _mm_sub_epi16(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s16(vsubq_s16(vreinterpretq_s16_m128i(a), vreinterpretq_s16_m128i(b))); +} + +// Adds the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/c9848chc(v=vs.100).aspx +FORCE_INLINE __m128 _mm_add_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_f32(vaddq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// adds the scalar single-precision floating point values of a and b. https://msdn.microsoft.com/en-us/library/be94x2y6(v=vs.100).aspx +FORCE_INLINE __m128 _mm_add_ss(__m128 a, __m128 b) +{ + float32_t b0 = vgetq_lane_f32(vreinterpretq_f32_m128(b), 0); + float32x4_t value = vsetq_lane_f32(b0, vdupq_n_f32(0), 0); + //the upper values in the result must be the remnants of . + return vreinterpretq_m128_f32(vaddq_f32(a, value)); +} + +// Adds the 4 signed or unsigned 32-bit integers in a to the 4 signed or unsigned 32-bit integers in b. https://msdn.microsoft.com/en-us/library/vstudio/09xs4fkk(v=vs.100).aspx +FORCE_INLINE __m128i _mm_add_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32(vaddq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b))); +} + +// Adds the 8 signed or unsigned 16-bit integers in a to the 8 signed or unsigned 16-bit integers in b. https://msdn.microsoft.com/en-us/library/fceha5k4(v=vs.100).aspx +FORCE_INLINE __m128i _mm_add_epi16(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s16(vaddq_s16(vreinterpretq_s16_m128i(a), vreinterpretq_s16_m128i(b))); +} + +// Multiplies the 8 signed or unsigned 16-bit integers from a by the 8 signed or unsigned 16-bit integers from b. https://msdn.microsoft.com/en-us/library/vstudio/9ks1472s(v=vs.100).aspx +FORCE_INLINE __m128i _mm_mullo_epi16(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s16(vmulq_s16(vreinterpretq_s16_m128i(a), vreinterpretq_s16_m128i(b))); +} + +// Multiplies the 4 signed or unsigned 32-bit integers from a by the 4 signed or unsigned 32-bit integers from b. https://msdn.microsoft.com/en-us/library/vstudio/bb531409(v=vs.100).aspx +FORCE_INLINE __m128i _mm_mullo_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32(vmulq_s32(vreinterpretq_s32_m128i(a),vreinterpretq_s32_m128i(b))); +} + +// Multiplies the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/22kbk6t9(v=vs.100).aspx +FORCE_INLINE __m128 _mm_mul_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_f32(vmulq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Divides the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/edaw8147(v=vs.100).aspx +FORCE_INLINE __m128 _mm_div_ps(__m128 a, __m128 b) +{ + float32x4_t recip0 = vrecpeq_f32(vreinterpretq_f32_m128(b)); + float32x4_t recip1 = vmulq_f32(recip0, vrecpsq_f32(recip0, vreinterpretq_f32_m128(b))); + return vreinterpretq_m128_f32(vmulq_f32(vreinterpretq_f32_m128(a), recip1)); +} + +// Divides the scalar single-precision floating point value of a by b. https://msdn.microsoft.com/en-us/library/4y73xa49(v=vs.100).aspx +FORCE_INLINE __m128 _mm_div_ss(__m128 a, __m128 b) +{ + float32_t value = vgetq_lane_f32(vreinterpretq_f32_m128(_mm_div_ps(a, b)), 0); + return vreinterpretq_m128_f32(vsetq_lane_f32(value, vreinterpretq_f32_m128(a), 0)); +} + +// This version does additional iterations to improve accuracy. Between 1 and 4 recommended. +// Computes the approximations of reciprocals of the four single-precision, floating-point values of a. https://msdn.microsoft.com/en-us/library/vstudio/796k1tty(v=vs.100).aspx +FORCE_INLINE __m128 recipq_newton(__m128 in, int n) +{ + int i; + float32x4_t recip = vrecpeq_f32(vreinterpretq_f32_m128(in)); + for (i = 0; i < n; ++i) + { + recip = vmulq_f32(recip, vrecpsq_f32(recip, vreinterpretq_f32_m128(in))); + } + return vreinterpretq_m128_f32(recip); +} + +// Computes the approximations of reciprocals of the four single-precision, floating-point values of a. https://msdn.microsoft.com/en-us/library/vstudio/796k1tty(v=vs.100).aspx +FORCE_INLINE __m128 _mm_rcp_ps(__m128 in) +{ + float32x4_t recip = vrecpeq_f32(vreinterpretq_f32_m128(in)); + recip = vmulq_f32(recip, vrecpsq_f32(recip, vreinterpretq_f32_m128(in))); + return vreinterpretq_m128_f32(recip); +} + +// Computes the approximations of square roots of the four single-precision, floating-point values of a. First computes reciprocal square roots and then reciprocals of the four values. https://msdn.microsoft.com/en-us/library/vstudio/8z67bwwk(v=vs.100).aspx +FORCE_INLINE __m128 _mm_sqrt_ps(__m128 in) +{ + float32x4_t recipsq = vrsqrteq_f32(vreinterpretq_f32_m128(in)); + float32x4_t sq = vrecpeq_f32(recipsq); + // ??? use step versions of both sqrt and recip for better accuracy? + return vreinterpretq_m128_f32(sq); +} + +// Computes the approximation of the square root of the scalar single-precision floating point value of in. https://msdn.microsoft.com/en-us/library/ahfsc22d(v=vs.100).aspx +FORCE_INLINE __m128 _mm_sqrt_ss(__m128 in) +{ + float32_t value = vgetq_lane_f32(vreinterpretq_f32_m128(_mm_sqrt_ps(in)), 0); + return vreinterpretq_m128_f32(vsetq_lane_f32(value, vreinterpretq_f32_m128(in), 0)); +} + +// Computes the approximations of the reciprocal square roots of the four single-precision floating point values of in. https://msdn.microsoft.com/en-us/library/22hfsh53(v=vs.100).aspx +FORCE_INLINE __m128 _mm_rsqrt_ps(__m128 in) +{ + return vreinterpretq_m128_f32(vrsqrteq_f32(vreinterpretq_f32_m128(in))); +} + +// Computes the maximums of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/ff5d607a(v=vs.100).aspx +FORCE_INLINE __m128 _mm_max_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_f32(vmaxq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Computes the minima of the four single-precision, floating-point values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/wh13kadz(v=vs.100).aspx +FORCE_INLINE __m128 _mm_min_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_f32(vminq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Computes the maximum of the two lower scalar single-precision floating point values of a and b. https://msdn.microsoft.com/en-us/library/s6db5esz(v=vs.100).aspx +FORCE_INLINE __m128 _mm_max_ss(__m128 a, __m128 b) +{ + float32_t value = vgetq_lane_f32(vmaxq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + return vreinterpretq_m128_f32(vsetq_lane_f32(value, vreinterpretq_f32_m128(a), 0)); +} + +// Computes the minimum of the two lower scalar single-precision floating point values of a and b. https://msdn.microsoft.com/en-us/library/0a9y7xaa(v=vs.100).aspx +FORCE_INLINE __m128 _mm_min_ss(__m128 a, __m128 b) +{ + float32_t value = vgetq_lane_f32(vminq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + return vreinterpretq_m128_f32(vsetq_lane_f32(value, vreinterpretq_f32_m128(a), 0)); +} + +// Computes the pairwise minima of the 8 signed 16-bit integers from a and the 8 signed 16-bit integers from b. https://msdn.microsoft.com/en-us/library/vstudio/6te997ew(v=vs.100).aspx +FORCE_INLINE __m128i _mm_min_epi16(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s16(vminq_s16(vreinterpretq_s16_m128i(a), vreinterpretq_s16_m128i(b))); +} + +// epi versions of min/max +// Computes the pariwise maximums of the four signed 32-bit integer values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/bb514055(v=vs.100).aspx +FORCE_INLINE __m128i _mm_max_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32(vmaxq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b))); +} + +// Computes the pariwise minima of the four signed 32-bit integer values of a and b. https://msdn.microsoft.com/en-us/library/vstudio/bb531476(v=vs.100).aspx +FORCE_INLINE __m128i _mm_min_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s32(vminq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b))); +} + +// Multiplies the 8 signed 16-bit integers from a by the 8 signed 16-bit integers from b. https://msdn.microsoft.com/en-us/library/vstudio/59hddw1d(v=vs.100).aspx +FORCE_INLINE __m128i _mm_mulhi_epi16(__m128i a, __m128i b) +{ + /* apoty: issue with large values because of result saturation */ + //int16x8_t ret = vqdmulhq_s16(vreinterpretq_s16_m128i(a), vreinterpretq_s16_m128i(b)); /* =2*a*b */ + //return vreinterpretq_m128i_s16(vshrq_n_s16(ret, 1)); + int16x4_t a3210 = vget_low_s16(vreinterpretq_s16_m128i(a)); + int16x4_t b3210 = vget_low_s16(vreinterpretq_s16_m128i(b)); + int32x4_t ab3210 = vmull_s16(a3210, b3210); /* 3333222211110000 */ + int16x4_t a7654 = vget_high_s16(vreinterpretq_s16_m128i(a)); + int16x4_t b7654 = vget_high_s16(vreinterpretq_s16_m128i(b)); + int32x4_t ab7654 = vmull_s16(a7654, b7654); /* 7777666655554444 */ + uint16x8x2_t r = vuzpq_u16(vreinterpretq_u16_s32(ab3210), vreinterpretq_u16_s32(ab7654)); + return vreinterpretq_m128i_u16(r.val[1]); +} + +// Computes pairwise add of each argument as single-precision, floating-point values a and b. +//https://msdn.microsoft.com/en-us/library/yd9wecaa.aspx +FORCE_INLINE __m128 _mm_hadd_ps(__m128 a, __m128 b ) +{ +#if defined(__aarch64__) + return vreinterpretq_m128_f32(vpaddq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); //AArch64 +#else + float32x2_t a10 = vget_low_f32(vreinterpretq_f32_m128(a)); + float32x2_t a32 = vget_high_f32(vreinterpretq_f32_m128(a)); + float32x2_t b10 = vget_low_f32(vreinterpretq_f32_m128(b)); + float32x2_t b32 = vget_high_f32(vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_f32(vcombine_f32(vpadd_f32(a10, a32), vpadd_f32(b10, b32))); +#endif +} + +// ****************************************** +// Compare operations +// ****************************************** + +// Compares for less than https://msdn.microsoft.com/en-us/library/vstudio/f330yhc8(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmplt_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32(vcltq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Compares for greater than. https://msdn.microsoft.com/en-us/library/vstudio/11dy102s(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmpgt_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32(vcgtq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Compares for greater than or equal. https://msdn.microsoft.com/en-us/library/vstudio/fs813y2t(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmpge_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32(vcgeq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Compares for less than or equal. https://msdn.microsoft.com/en-us/library/vstudio/1s75w83z(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmple_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32(vcleq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Compares for equality. https://msdn.microsoft.com/en-us/library/vstudio/36aectz5(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cmpeq_ps(__m128 a, __m128 b) +{ + return vreinterpretq_m128_u32(vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); +} + +// Compares the 4 signed 32-bit integers in a and the 4 signed 32-bit integers in b for less than. https://msdn.microsoft.com/en-us/library/vstudio/4ak0bf5d(v=vs.100).aspx +FORCE_INLINE __m128i _mm_cmplt_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_u32(vcltq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b))); +} + +// Compares the 4 signed 32-bit integers in a and the 4 signed 32-bit integers in b for greater than. https://msdn.microsoft.com/en-us/library/vstudio/1s9f2z0y(v=vs.100).aspx +FORCE_INLINE __m128i _mm_cmpgt_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_u32(vcgtq_s32(vreinterpretq_s32_m128i(a), vreinterpretq_s32_m128i(b))); +} + +// Compares the four 32-bit floats in a and b to check if any values are NaN. Ordered compare between each value returns true for "orderable" and false for "not orderable" (NaN). https://msdn.microsoft.com/en-us/library/vstudio/0h9w00fx(v=vs.100).aspx +// see also: +// http://stackoverflow.com/questions/8627331/what-does-ordered-unordered-comparison-mean +// http://stackoverflow.com/questions/29349621/neon-isnanval-intrinsics +FORCE_INLINE __m128 _mm_cmpord_ps(__m128 a, __m128 b ) +{ + // Note: NEON does not have ordered compare builtin + // Need to compare a eq a and b eq b to check for NaN + // Do AND of results to get final + uint32x4_t ceqaa = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t ceqbb = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + return vreinterpretq_m128_u32(vandq_u32(ceqaa, ceqbb)); +} + +// Compares the lower single-precision floating point scalar values of a and b using a less than operation. : https://msdn.microsoft.com/en-us/library/2kwe606b(v=vs.90).aspx +// Important note!! The documentation on MSDN is incorrect! If either of the values is a NAN the docs say you will get a one, but in fact, it will return a zero!! +FORCE_INLINE int _mm_comilt_ss(__m128 a, __m128 b) +{ + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); + uint32x4_t a_lt_b = vcltq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)); + return (vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_lt_b), 0) != 0) ? 1 : 0; +} + +// Compares the lower single-precision floating point scalar values of a and b using a greater than operation. : https://msdn.microsoft.com/en-us/library/b0738e0t(v=vs.100).aspx +FORCE_INLINE int _mm_comigt_ss(__m128 a, __m128 b) +{ + //return vgetq_lane_u32(vcgtq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); + uint32x4_t a_gt_b = vcgtq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)); + return (vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_gt_b), 0) != 0) ? 1 : 0; +} + +// Compares the lower single-precision floating point scalar values of a and b using a less than or equal operation. : https://msdn.microsoft.com/en-us/library/1w4t7c57(v=vs.90).aspx +FORCE_INLINE int _mm_comile_ss(__m128 a, __m128 b) +{ + //return vgetq_lane_u32(vcleq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); + uint32x4_t a_le_b = vcleq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)); + return (vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_le_b), 0) != 0) ? 1 : 0; +} + +// Compares the lower single-precision floating point scalar values of a and b using a greater than or equal operation. : https://msdn.microsoft.com/en-us/library/8t80des6(v=vs.100).aspx +FORCE_INLINE int _mm_comige_ss(__m128 a, __m128 b) +{ + //return vgetq_lane_u32(vcgeq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); + uint32x4_t a_ge_b = vcgeq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)); + return (vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_ge_b), 0) != 0) ? 1 : 0; +} + +// Compares the lower single-precision floating point scalar values of a and b using an equality operation. : https://msdn.microsoft.com/en-us/library/93yx2h2b(v=vs.100).aspx +FORCE_INLINE int _mm_comieq_ss(__m128 a, __m128 b) +{ + //return vgetq_lane_u32(vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_or_b_nan = vmvnq_u32(vandq_u32(a_not_nan, b_not_nan)); + uint32x4_t a_eq_b = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)); + return (vgetq_lane_u32(vorrq_u32(a_or_b_nan, a_eq_b), 0) != 0) ? 1 : 0; +} + +// Compares the lower single-precision floating point scalar values of a and b using an inequality operation. : https://msdn.microsoft.com/en-us/library/bafh5e0a(v=vs.90).aspx +FORCE_INLINE int _mm_comineq_ss(__m128 a, __m128 b) +{ + //return !vgetq_lane_u32(vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b)), 0); + uint32x4_t a_not_nan = vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(a)); + uint32x4_t b_not_nan = vceqq_f32(vreinterpretq_f32_m128(b), vreinterpretq_f32_m128(b)); + uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan); + uint32x4_t a_neq_b = vmvnq_u32(vceqq_f32(vreinterpretq_f32_m128(a), vreinterpretq_f32_m128(b))); + return (vgetq_lane_u32(vandq_u32(a_and_b_not_nan, a_neq_b), 0) != 0) ? 1 : 0; +} + +// according to the documentation, these intrinsics behave the same as the non-'u' versions. We'll just alias them here. +#define _mm_ucomilt_ss _mm_comilt_ss +#define _mm_ucomile_ss _mm_comile_ss +#define _mm_ucomigt_ss _mm_comigt_ss +#define _mm_ucomige_ss _mm_comige_ss +#define _mm_ucomieq_ss _mm_comieq_ss +#define _mm_ucomineq_ss _mm_comineq_ss + +// ****************************************** +// Conversions +// ****************************************** + +// Converts the four single-precision, floating-point values of a to signed 32-bit integer values using truncate. https://msdn.microsoft.com/en-us/library/vstudio/1h005y6x(v=vs.100).aspx +FORCE_INLINE __m128i _mm_cvttps_epi32(__m128 a) +{ + return vreinterpretq_m128i_s32(vcvtq_s32_f32(vreinterpretq_f32_m128(a))); +} + +// Converts the four signed 32-bit integer values of a to single-precision, floating-point values https://msdn.microsoft.com/en-us/library/vstudio/36bwxcx5(v=vs.100).aspx +FORCE_INLINE __m128 _mm_cvtepi32_ps(__m128i a) +{ + return vreinterpretq_m128_f32(vcvtq_f32_s32(vreinterpretq_s32_m128i(a))); +} + +// Converts the four unsigned 8-bit integers in the lower 32 bits to four unsigned 32-bit integers. https://msdn.microsoft.com/en-us/library/bb531467%28v=vs.100%29.aspx +FORCE_INLINE __m128i _mm_cvtepu8_epi32(__m128i a) +{ + uint8x16_t u8x16 = vreinterpretq_u8_s32(a); /* xxxx xxxx xxxx DCBA */ + uint16x8_t u16x8 = vmovl_u8(vget_low_u8(u8x16)); /* 0x0x 0x0x 0D0C 0B0A */ + uint32x4_t u32x4 = vmovl_u16(vget_low_u16(u16x8)); /* 000D 000C 000B 000A */ + return vreinterpretq_s32_u32(u32x4); +} + +// Converts the four signed 16-bit integers in the lower 64 bits to four signed 32-bit integers. https://msdn.microsoft.com/en-us/library/bb514079%28v=vs.100%29.aspx +FORCE_INLINE __m128i _mm_cvtepi16_epi32(__m128i a) +{ + return vreinterpretq_m128i_s32(vmovl_s16(vget_low_s16(vreinterpretq_s16_m128i(a)))); +} + +// Converts the four single-precision, floating-point values of a to signed 32-bit integer values. https://msdn.microsoft.com/en-us/library/vstudio/xdc42k5e(v=vs.100).aspx +// *NOTE*. The default rounding mode on SSE is 'round to even', which ArmV7 does not support! +// It is supported on ARMv8 however. +FORCE_INLINE __m128i _mm_cvtps_epi32(__m128 a) +{ +#if defined(__aarch64__) + return vcvtnq_s32_f32(a); +#else + uint32x4_t signmask = vdupq_n_u32(0x80000000); + float32x4_t half = vbslq_f32(signmask, vreinterpretq_f32_m128(a), vdupq_n_f32(0.5f)); /* +/- 0.5 */ + int32x4_t r_normal = vcvtq_s32_f32(vaddq_f32(vreinterpretq_f32_m128(a), half)); /* round to integer: [a + 0.5]*/ + int32x4_t r_trunc = vcvtq_s32_f32(vreinterpretq_f32_m128(a)); /* truncate to integer: [a] */ + int32x4_t plusone = vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_s32(vnegq_s32(r_trunc)), 31)); /* 1 or 0 */ + int32x4_t r_even = vbicq_s32(vaddq_s32(r_trunc, plusone), vdupq_n_s32(1)); /* ([a] + {0,1}) & ~1 */ + float32x4_t delta = vsubq_f32(vreinterpretq_f32_m128(a), vcvtq_f32_s32(r_trunc)); /* compute delta: delta = (a - [a]) */ + uint32x4_t is_delta_half = vceqq_f32(delta, half); /* delta == +/- 0.5 */ + return vreinterpretq_m128i_s32(vbslq_s32(is_delta_half, r_even, r_normal)); +#endif +} + +// Moves the least significant 32 bits of a to a 32-bit integer. https://msdn.microsoft.com/en-us/library/5z7a9642%28v=vs.90%29.aspx +FORCE_INLINE int _mm_cvtsi128_si32(__m128i a) +{ + return vgetq_lane_s32(vreinterpretq_s32_m128i(a), 0); +} + +// Moves 32-bit integer a to the least significant 32 bits of an __m128 object, zero extending the upper bits. https://msdn.microsoft.com/en-us/library/ct3539ha%28v=vs.90%29.aspx +FORCE_INLINE __m128i _mm_cvtsi32_si128(int a) +{ + return vreinterpretq_m128i_s32(vsetq_lane_s32(a, vdupq_n_s32(0), 0)); +} + + +// Applies a type cast to reinterpret four 32-bit floating point values passed in as a 128-bit parameter as packed 32-bit integers. https://msdn.microsoft.com/en-us/library/bb514099.aspx +FORCE_INLINE __m128i _mm_castps_si128(__m128 a) +{ + return vreinterpretq_m128i_s32(vreinterpretq_s32_m128(a)); +} + +// Applies a type cast to reinterpret four 32-bit integers passed in as a 128-bit parameter as packed 32-bit floating point values. https://msdn.microsoft.com/en-us/library/bb514029.aspx +FORCE_INLINE __m128 _mm_castsi128_ps(__m128i a) +{ + return vreinterpretq_m128_s32(vreinterpretq_s32_m128i(a)); +} + +// Loads 128-bit value. : https://msdn.microsoft.com/en-us/library/atzzad1h(v=vs.80).aspx +FORCE_INLINE __m128i _mm_load_si128(const __m128i *p) +{ + return vreinterpretq_m128i_s32(vld1q_s32((int32_t *)p)); +} + +// ****************************************** +// Miscellaneous Operations +// ****************************************** + +// Packs the 16 signed 16-bit integers from a and b into 8-bit integers and saturates. https://msdn.microsoft.com/en-us/library/k4y4f7w5%28v=vs.90%29.aspx +FORCE_INLINE __m128i _mm_packs_epi16(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s8(vcombine_s8(vqmovn_s16(vreinterpretq_s16_m128i(a)), vqmovn_s16(vreinterpretq_s16_m128i(b)))); +} + +// Packs the 16 signed 16 - bit integers from a and b into 8 - bit unsigned integers and saturates. https://msdn.microsoft.com/en-us/library/07ad1wx4(v=vs.100).aspx +FORCE_INLINE __m128i _mm_packus_epi16(const __m128i a, const __m128i b) +{ + return vreinterpretq_m128i_u8(vcombine_u8(vqmovun_s16(vreinterpretq_s16_m128i(a)), vqmovun_s16(vreinterpretq_s16_m128i(b)))); +} + +// Packs the 8 signed 32-bit integers from a and b into signed 16-bit integers and saturates. https://msdn.microsoft.com/en-us/library/393t56f9%28v=vs.90%29.aspx +FORCE_INLINE __m128i _mm_packs_epi32(__m128i a, __m128i b) +{ + return vreinterpretq_m128i_s16(vcombine_s16(vqmovn_s32(vreinterpretq_s32_m128i(a)), vqmovn_s32(vreinterpretq_s32_m128i(b)))); +} + +// Interleaves the lower 8 signed or unsigned 8-bit integers in a with the lower 8 signed or unsigned 8-bit integers in b. https://msdn.microsoft.com/en-us/library/xf7k860c%28v=vs.90%29.aspx +FORCE_INLINE __m128i _mm_unpacklo_epi8(__m128i a, __m128i b) +{ + int8x8_t a1 = vreinterpret_s8_s16(vget_low_s16(vreinterpretq_s16_m128i(a))); + int8x8_t b1 = vreinterpret_s8_s16(vget_low_s16(vreinterpretq_s16_m128i(b))); + int8x8x2_t result = vzip_s8(a1, b1); + return vreinterpretq_m128i_s8(vcombine_s8(result.val[0], result.val[1])); +} + +// Interleaves the lower 4 signed or unsigned 16-bit integers in a with the lower 4 signed or unsigned 16-bit integers in b. https://msdn.microsoft.com/en-us/library/btxb17bw%28v=vs.90%29.aspx +FORCE_INLINE __m128i _mm_unpacklo_epi16(__m128i a, __m128i b) +{ + int16x4_t a1 = vget_low_s16(vreinterpretq_s16_m128i(a)); + int16x4_t b1 = vget_low_s16(vreinterpretq_s16_m128i(b)); + int16x4x2_t result = vzip_s16(a1, b1); + return vreinterpretq_m128i_s16(vcombine_s16(result.val[0], result.val[1])); +} + +// Interleaves the lower 2 signed or unsigned 32 - bit integers in a with the lower 2 signed or unsigned 32 - bit integers in b. https://msdn.microsoft.com/en-us/library/x8atst9d(v=vs.100).aspx +FORCE_INLINE __m128i _mm_unpacklo_epi32(__m128i a, __m128i b) +{ + int32x2_t a1 = vget_low_s32(vreinterpretq_s32_m128i(a)); + int32x2_t b1 = vget_low_s32(vreinterpretq_s32_m128i(b)); + int32x2x2_t result = vzip_s32(a1, b1); + return vreinterpretq_m128i_s32(vcombine_s32(result.val[0], result.val[1])); +} + +// Selects and interleaves the lower two single-precision, floating-point values from a and b. https://msdn.microsoft.com/en-us/library/25st103b%28v=vs.90%29.aspx +FORCE_INLINE __m128 _mm_unpacklo_ps(__m128 a, __m128 b) +{ + float32x2_t a1 = vget_low_f32(vreinterpretq_f32_m128(a)); + float32x2_t b1 = vget_low_f32(vreinterpretq_f32_m128(b)); + float32x2x2_t result = vzip_f32(a1, b1); + return vreinterpretq_m128_f32(vcombine_f32(result.val[0], result.val[1])); +} + +// Selects and interleaves the upper two single-precision, floating-point values from a and b. https://msdn.microsoft.com/en-us/library/skccxx7d%28v=vs.90%29.aspx +FORCE_INLINE __m128 _mm_unpackhi_ps(__m128 a, __m128 b) +{ + float32x2_t a1 = vget_high_f32(vreinterpretq_f32_m128(a)); + float32x2_t b1 = vget_high_f32(vreinterpretq_f32_m128(b)); + float32x2x2_t result = vzip_f32(a1, b1); + return vreinterpretq_m128_f32(vcombine_f32(result.val[0], result.val[1])); +} + +// Interleaves the upper 8 signed or unsigned 8-bit integers in a with the upper 8 signed or unsigned 8-bit integers in b. https://msdn.microsoft.com/en-us/library/t5h7783k(v=vs.100).aspx +FORCE_INLINE __m128i _mm_unpackhi_epi8(__m128i a, __m128i b) +{ + int8x8_t a1 = vreinterpret_s8_s16(vget_high_s16(vreinterpretq_s16_m128i(a))); + int8x8_t b1 = vreinterpret_s8_s16(vget_high_s16(vreinterpretq_s16_m128i(b))); + int8x8x2_t result = vzip_s8(a1, b1); + return vreinterpretq_m128i_s8(vcombine_s8(result.val[0], result.val[1])); +} + +// Interleaves the upper 4 signed or unsigned 16-bit integers in a with the upper 4 signed or unsigned 16-bit integers in b. https://msdn.microsoft.com/en-us/library/03196cz7(v=vs.100).aspx +FORCE_INLINE __m128i _mm_unpackhi_epi16(__m128i a, __m128i b) +{ + int16x4_t a1 = vget_high_s16(vreinterpretq_s16_m128i(a)); + int16x4_t b1 = vget_high_s16(vreinterpretq_s16_m128i(b)); + int16x4x2_t result = vzip_s16(a1, b1); + return vreinterpretq_m128i_s16(vcombine_s16(result.val[0], result.val[1])); +} + +// Interleaves the upper 2 signed or unsigned 32-bit integers in a with the upper 2 signed or unsigned 32-bit integers in b. https://msdn.microsoft.com/en-us/library/65sa7cbs(v=vs.100).aspx +FORCE_INLINE __m128i _mm_unpackhi_epi32(__m128i a, __m128i b) +{ + int32x2_t a1 = vget_high_s32(vreinterpretq_s32_m128i(a)); + int32x2_t b1 = vget_high_s32(vreinterpretq_s32_m128i(b)); + int32x2x2_t result = vzip_s32(a1, b1); + return vreinterpretq_m128i_s32(vcombine_s32(result.val[0], result.val[1])); +} + +// Extracts the selected signed or unsigned 16-bit integer from a and zero extends. https://msdn.microsoft.com/en-us/library/6dceta0c(v=vs.100).aspx +//FORCE_INLINE int _mm_extract_epi16(__m128i a, __constrange(0,8) int imm) +#define _mm_extract_epi16(a, imm) \ +({ \ + (vgetq_lane_s16(vreinterpretq_s16_m128i(a), (imm)) & 0x0000ffffUL); \ +}) + +// Inserts the least significant 16 bits of b into the selected 16-bit integer of a. https://msdn.microsoft.com/en-us/library/kaze8hz1%28v=vs.100%29.aspx +//FORCE_INLINE __m128i _mm_insert_epi16(__m128i a, const int b, __constrange(0,8) int imm) +#define _mm_insert_epi16(a, b, imm) \ +({ \ + vreinterpretq_m128i_s16(vsetq_lane_s16((b), vreinterpretq_s16_m128i(a), (imm))); \ +}) + +// ****************************************** +// Streaming Extensions +// ****************************************** + +// Guarantees that every preceding store is globally visible before any subsequent store. https://msdn.microsoft.com/en-us/library/5h2w73d1%28v=vs.90%29.aspx +FORCE_INLINE void _mm_sfence(void) +{ + __sync_synchronize(); +} + +// Stores the data in a to the address p without polluting the caches. If the cache line containing address p is already in the cache, the cache will be updated.Address p must be 16 - byte aligned. https://msdn.microsoft.com/en-us/library/ba08y07y%28v=vs.90%29.aspx +FORCE_INLINE void _mm_stream_si128(__m128i *p, __m128i a) +{ + *p = a; +} + +// Cache line containing p is flushed and invalidated from all caches in the coherency domain. : https://msdn.microsoft.com/en-us/library/ba08y07y(v=vs.100).aspx +FORCE_INLINE void _mm_clflush(void const*p) +{ + // no corollary for Neon? +} + +#if defined(__GNUC__) || defined(__clang__) +# pragma pop_macro("ALIGN_STRUCT") +# pragma pop_macro("FORCE_INLINE") +#endif + +#endif diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index e28be3fa..4b1d346f 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -26,14 +26,18 @@ */ #pragma once -#ifdef __GNUC__ -#include + +#if defined(__aarch64__) +# include "crypto/SSE2NEON.h" +#elif defined(__GNUC__) +# include #else -#include -#endif // __GNUC__ +# include +#endif #include + #define saes_data(w) {\ w(0x63), w(0x7c), w(0x77), w(0x7b), w(0xf2), w(0x6b), w(0x6f), w(0xc5),\ w(0x30), w(0x01), w(0x67), w(0x2b), w(0xfe), w(0xd7), w(0xab), w(0x76),\ @@ -109,7 +113,7 @@ static inline uint32_t sub_word(uint32_t key) saes_sbox[key & 0xff]; } -#ifdef __clang__ +#if defined(__clang__) || defined(XMRIG_ARM) static inline uint32_t _rotr(uint32_t value, uint32_t amount) { return (value >> amount) | (value << ((32 - amount) & 31)); From 4b00eb4a9fbb68392a316d8ac6c36a0931567d74 Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 17 Nov 2017 12:59:46 +0300 Subject: [PATCH 21/58] #196 Fix Linux build. --- src/Platform_unix.cpp | 1 + src/Summary.cpp | 1 + src/api/ApiState.cpp | 4 ++-- src/api/NetworkState.cpp | 1 + src/workers/Hashrate.cpp | 9 +++++---- 5 files changed, 10 insertions(+), 6 deletions(-) diff --git a/src/Platform_unix.cpp b/src/Platform_unix.cpp index ecccc49e..c0589307 100644 --- a/src/Platform_unix.cpp +++ b/src/Platform_unix.cpp @@ -22,6 +22,7 @@ */ #include +#include #include #include #include diff --git a/src/Summary.cpp b/src/Summary.cpp index c6c53341..2d93f429 100644 --- a/src/Summary.cpp +++ b/src/Summary.cpp @@ -23,6 +23,7 @@ #include +#include #include diff --git a/src/api/ApiState.cpp b/src/api/ApiState.cpp index bade355a..0ccb34fe 100644 --- a/src/api/ApiState.cpp +++ b/src/api/ApiState.cpp @@ -21,7 +21,7 @@ * along with this program. If not, see . */ -#include +#include #include #include @@ -53,7 +53,7 @@ extern "C" static inline double normalize(double d) { - if (!std::isnormal(d)) { + if (!isnormal(d)) { return 0.0; } diff --git a/src/api/NetworkState.cpp b/src/api/NetworkState.cpp index 997f52df..bae290d0 100644 --- a/src/api/NetworkState.cpp +++ b/src/api/NetworkState.cpp @@ -23,6 +23,7 @@ #include +#include #include #include diff --git a/src/workers/Hashrate.cpp b/src/workers/Hashrate.cpp index 5c20c247..bd5b7df6 100644 --- a/src/workers/Hashrate.cpp +++ b/src/workers/Hashrate.cpp @@ -23,8 +23,9 @@ #include -#include +#include #include +#include #include "log/Log.h" #include "Options.h" @@ -33,7 +34,7 @@ inline const char *format(double h, char* buf, size_t size) { - if (std::isnormal(h)) { + if (isnormal(h)) { snprintf(buf, size, "%03.1f", h); return buf; } @@ -77,7 +78,7 @@ double Hashrate::calc(size_t ms) const for (int i = 0; i < m_threads; ++i) { data = calc(i, ms); - if (std::isnormal(data)) { + if (isnormal(data)) { result += data; } } @@ -170,7 +171,7 @@ void Hashrate::stop() void Hashrate::updateHighest() { double highest = calc(ShortInterval); - if (std::isnormal(highest) && highest > m_highest) { + if (isnormal(highest) && highest > m_highest) { m_highest = highest; } } From 1961dcf82470bda4eaa15097747cbe3a65c9f4d2 Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 17 Nov 2017 22:44:36 +0300 Subject: [PATCH 22/58] #204 Fix Linux build, again. --- src/api/ApiState.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/api/ApiState.cpp b/src/api/ApiState.cpp index 0ccb34fe..c963a1d6 100644 --- a/src/api/ApiState.cpp +++ b/src/api/ApiState.cpp @@ -57,7 +57,7 @@ static inline double normalize(double d) return 0.0; } - return std::floor(d * 100.0) / 100.0; + return floor(d * 100.0) / 100.0; } From 989c217b3f91889fd4299a0792b06d6dd65768ae Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 18 Nov 2017 14:07:04 +0300 Subject: [PATCH 23/58] #200 Use fprintf failback when fail to use uv_tty. --- src/Options.h | 1 + src/log/ConsoleLog.cpp | 19 ++++++++++--------- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/src/Options.h b/src/Options.h index 06b86f38..9070888f 100644 --- a/src/Options.h +++ b/src/Options.h @@ -76,6 +76,7 @@ public: inline int retryPause() const { return m_retryPause; } inline int threads() const { return m_threads; } inline int64_t affinity() const { return m_affinity; } + inline void setColors(bool colors) { m_colors = colors; } inline static void release() { delete m_self; } diff --git a/src/log/ConsoleLog.cpp b/src/log/ConsoleLog.cpp index ef8516eb..45733858 100644 --- a/src/log/ConsoleLog.cpp +++ b/src/log/ConsoleLog.cpp @@ -36,6 +36,7 @@ #include "log/ConsoleLog.h" #include "log/Log.h" +#include "Options.h" ConsoleLog::ConsoleLog(bool colors) : @@ -43,6 +44,8 @@ ConsoleLog::ConsoleLog(bool colors) : m_stream(nullptr) { if (uv_tty_init(uv_default_loop(), &m_tty, 1, 0) < 0) { + Options::i()->setColors(false); + m_colors = false; return; } @@ -65,10 +68,6 @@ ConsoleLog::ConsoleLog(bool colors) : void ConsoleLog::message(int level, const char* fmt, va_list args) { - if (!isWritable()) { - return; - } - time_t now = time(nullptr); tm stime; @@ -121,10 +120,6 @@ void ConsoleLog::message(int level, const char* fmt, va_list args) void ConsoleLog::text(const char* fmt, va_list args) { - if (!isWritable()) { - return; - } - snprintf(m_fmt, sizeof(m_fmt) - 1, "%s%s\n", fmt, m_colors ? Log::kCL_N : ""); print(args); @@ -149,5 +144,11 @@ void ConsoleLog::print(va_list args) return; } - uv_try_write(m_stream, &m_uvBuf, 1); + if (!isWritable()) { + fprintf(stdout, m_buf); + fflush(stdout); + } + else { + uv_try_write(m_stream, &m_uvBuf, 1); + } } From 47527d48ee19fc55ece8e84618daf19b7037bb34 Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 24 Nov 2017 00:23:04 +0300 Subject: [PATCH 24/58] Fixed build in termux environment, thanks Imran Yusuff. --- CMakeLists.txt | 7 +++++++ src/Cpu_unix.cpp | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0275320f..64d504f7 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -142,6 +142,13 @@ if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD) set(EXTRA_LIBS ${EXTRA_LIBS} kvm) endif() +if (CMAKE_SYSTEM_NAME MATCHES "Linux") + EXECUTE_PROCESS(COMMAND uname -o COMMAND tr -d '\n' OUTPUT_VARIABLE OPERATING_SYSTEM) + if (OPERATING_SYSTEM MATCHES "Android") + set(EXTRA_LIBS ${EXTRA_LIBS} log) + endif() +endif() + add_definitions(/D__STDC_FORMAT_MACROS) add_definitions(/DUNICODE) #add_definitions(/DAPP_DEBUG) diff --git a/src/Cpu_unix.cpp b/src/Cpu_unix.cpp index 8de98c8c..9a13e7a5 100644 --- a/src/Cpu_unix.cpp +++ b/src/Cpu_unix.cpp @@ -70,6 +70,10 @@ void Cpu::setAffinity(int id, uint64_t mask) sched_setaffinity(0, sizeof(&set), &set); # endif } else { +# ifndef __ANDROID__ pthread_setaffinity_np(pthread_self(), sizeof(&set), &set); +# else + sched_setaffinity(gettid(), sizeof(&set), &set); +# endif } } From aa4f8b6fa78eb8331b5927ba5315b926ac75ce9c Mon Sep 17 00:00:00 2001 From: XMRig Date: Sun, 26 Nov 2017 22:23:23 +0300 Subject: [PATCH 25/58] #216 Added ARMv7 support. --- CMakeLists.txt | 6 +-- cmake/cpu.cmake | 11 +++++- cmake/flags.cmake | 10 ++++- src/Cpu_arm.cpp | 2 + src/crypto/CryptoNight.cpp | 12 +++++- ...{CryptoNight_arm64.h => CryptoNight_arm.h} | 39 +++++++++++++++++-- src/crypto/CryptoNight_x86.h | 6 +-- src/crypto/soft_aes.h | 2 +- src/log/ConsoleLog.cpp | 2 +- 9 files changed, 74 insertions(+), 16 deletions(-) rename src/crypto/{CryptoNight_arm64.h => CryptoNight_arm.h} (93%) diff --git a/CMakeLists.txt b/CMakeLists.txt index 64d504f7..0a1f238a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -64,8 +64,8 @@ set(HEADERS_CRYPTO src/crypto/soft_aes.h ) -if (XMRIG_ARM64) - set(HEADERS_CRYPTO "${HEADERS_CRYPTO}" src/crypto/CryptoNight_arm64.h) +if (XMRIG_ARM) + set(HEADERS_CRYPTO "${HEADERS_CRYPTO}" src/crypto/CryptoNight_arm.h) else() set(HEADERS_CRYPTO "${HEADERS_CRYPTO}" src/crypto/CryptoNight_x86.h) endif() @@ -168,7 +168,7 @@ if (WITH_LIBCPUID) else() add_definitions(/DXMRIG_NO_LIBCPUID) - if (XMRIG_ARM64) + if (XMRIG_ARM) set(SOURCES_CPUID src/Cpu_arm.cpp) else() set(SOURCES_CPUID src/Cpu_stub.cpp) diff --git a/cmake/cpu.cmake b/cmake/cpu.cmake index 56bbef96..96e61e2b 100644 --- a/cmake/cpu.cmake +++ b/cmake/cpu.cmake @@ -9,8 +9,17 @@ endif() if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64)$") - set(XMRIG_ARM64 ON) + set(XMRIG_ARM ON) + set(XMRIG_ARMv8 ON) set(WITH_LIBCPUID OFF) add_definitions(/DXMRIG_ARM) + add_definitions(/DXMRIG_ARMv8) +elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l)$") + set(XMRIG_ARM ON) + set(XMRIG_ARMv7 ON) + set(WITH_LIBCPUID OFF) + + add_definitions(/DXMRIG_ARM) + add_definitions(/DXMRIG_ARMv7) endif() diff --git a/cmake/flags.cmake b/cmake/flags.cmake index 7f32e115..488f1236 100644 --- a/cmake/flags.cmake +++ b/cmake/flags.cmake @@ -14,9 +14,12 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-exceptions -fno-rtti") set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -s -funroll-loops -fvariable-expansion-in-unroller -ftree-loop-if-convert-stores -fmerge-all-constants -fbranch-target-load-optimize2") - if (CMAKE_SYSTEM_PROCESSOR STREQUAL aarch64) + if (XMRIG_ARMv8) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto -flax-vector-conversions") + elseif (XMRIG_ARMv7) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfpu=neon -flax-vector-conversions") else() set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes") @@ -52,9 +55,12 @@ elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-exceptions -fno-rtti -Wno-missing-braces") set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants") - if (CMAKE_SYSTEM_PROCESSOR STREQUAL aarch64) + if (XMRIG_ARMv8) set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto") + elseif (XMRIG_ARMv7) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon -march=${CMAKE_SYSTEM_PROCESSOR}") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfpu=neon -march=${CMAKE_SYSTEM_PROCESSOR}") else() set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes") diff --git a/src/Cpu_arm.cpp b/src/Cpu_arm.cpp index 906e0156..c2047ffb 100644 --- a/src/Cpu_arm.cpp +++ b/src/Cpu_arm.cpp @@ -47,6 +47,8 @@ void Cpu::initCommon() { memcpy(m_brand, "Unknown", 7); +# if defined(XMRIG_ARMv8) m_flags |= X86_64; m_flags |= AES; +# endif } diff --git a/src/crypto/CryptoNight.cpp b/src/crypto/CryptoNight.cpp index 6fdf9d92..3ac9e94b 100644 --- a/src/crypto/CryptoNight.cpp +++ b/src/crypto/CryptoNight.cpp @@ -24,8 +24,8 @@ #include "crypto/CryptoNight.h" -#if defined(__aarch64__) -# include "crypto/CryptoNight_arm64.h" +#if defined(XMRIG_ARM) +# include "crypto/CryptoNight_arm.h" #else # include "crypto/CryptoNight_x86.h" #endif @@ -40,12 +40,16 @@ void (*cryptonight_hash_ctx)(const void *input, size_t size, void *output, crypt static void cryptonight_av1_aesni(const void *input, size_t size, void *output, struct cryptonight_ctx *ctx) { +# if !defined(XMRIG_ARMv7) cryptonight_hash<0x80000, MEMORY, 0x1FFFF0, false>(input, size, output, ctx); +# endif } static void cryptonight_av2_aesni_double(const void *input, size_t size, void *output, cryptonight_ctx *ctx) { +# if !defined(XMRIG_ARMv7) cryptonight_double_hash<0x80000, MEMORY, 0x1FFFF0, false>(input, size, output, ctx); +# endif } @@ -61,12 +65,16 @@ static void cryptonight_av4_softaes_double(const void *input, size_t size, void #ifndef XMRIG_NO_AEON static void cryptonight_lite_av1_aesni(const void *input, size_t size, void *output, cryptonight_ctx *ctx) { + # if !defined(XMRIG_ARMv7) cryptonight_hash<0x40000, MEMORY_LITE, 0xFFFF0, false>(input, size, output, ctx); +#endif } static void cryptonight_lite_av2_aesni_double(const void *input, size_t size, void *output, cryptonight_ctx *ctx) { +# if !defined(XMRIG_ARMv7) cryptonight_double_hash<0x40000, MEMORY_LITE, 0xFFFF0, false>(input, size, output, ctx); +# endif } diff --git a/src/crypto/CryptoNight_arm64.h b/src/crypto/CryptoNight_arm.h similarity index 93% rename from src/crypto/CryptoNight_arm64.h rename to src/crypto/CryptoNight_arm.h index 4d70b20d..15be6c3d 100644 --- a/src/crypto/CryptoNight_arm64.h +++ b/src/crypto/CryptoNight_arm.h @@ -22,8 +22,8 @@ * along with this program. If not, see . */ -#ifndef __CRYPTONIGHT_ARM64_H__ -#define __CRYPTONIGHT_ARM64_H__ +#ifndef __CRYPTONIGHT_ARM_H__ +#define __CRYPTONIGHT_ARM_H__ #if defined(XMRIG_ARM) && !defined(__clang__) @@ -86,12 +86,39 @@ static inline __attribute__((always_inline)) uint64_t _mm_cvtsi128_si64(__m128i #define EXTRACT64(X) _mm_cvtsi128_si64(X) +#if defined(XMRIG_ARMv8) static inline uint64_t __umul128(uint64_t a, uint64_t b, uint64_t* hi) { unsigned __int128 r = (unsigned __int128) a * (unsigned __int128) b; *hi = r >> 64; return (uint64_t) r; } +#else +static inline uint64_t __umul128(uint64_t multiplier, uint64_t multiplicand, uint64_t *product_hi) { + // multiplier = ab = a * 2^32 + b + // multiplicand = cd = c * 2^32 + d + // ab * cd = a * c * 2^64 + (a * d + b * c) * 2^32 + b * d + uint64_t a = multiplier >> 32; + uint64_t b = multiplier & 0xFFFFFFFF; + uint64_t c = multiplicand >> 32; + uint64_t d = multiplicand & 0xFFFFFFFF; + + //uint64_t ac = a * c; + uint64_t ad = a * d; + //uint64_t bc = b * c; + uint64_t bd = b * d; + + uint64_t adbc = ad + (b * c); + uint64_t adbc_carry = adbc < ad ? 1 : 0; + + // multiplier * multiplicand = product_hi * 2^64 + product_lo + uint64_t product_lo = bd + (adbc << 32); + uint64_t product_lo_carry = product_lo < bd ? 1 : 0; + *product_hi = (a * c) + (adbc >> 32) + (adbc_carry << 32) + product_lo_carry; + + return product_lo; +} +#endif // This will shift and xor tmp1 into itself as 4 32-bit vals such as @@ -176,6 +203,7 @@ static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, *x6 = soft_aesenc(*x6, key); *x7 = soft_aesenc(*x7, key); } +# ifndef XMRIG_ARMv7 else { *x0 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x0), key)); *x1 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x1), key)); @@ -186,6 +214,7 @@ static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, *x6 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x6), key)); *x7 = vaesmcq_u8(vaeseq_u8(*((uint8x16_t *) x7), key)); } +# endif } @@ -338,7 +367,9 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); } else { +# ifndef XMRIG_ARMv7 cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); +# endif } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); @@ -402,8 +433,10 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); } else { +# ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); +# endif } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); @@ -455,4 +488,4 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, extra_hashes[ctx->state1[0] & 3](ctx->state1, 200, static_cast(output) + 32); } -#endif /* __CRYPTONIGHT_ARM64_H__ */ +#endif /* __CRYPTONIGHT_ARM_H__ */ diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 75809b81..362a1a9f 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -21,8 +21,8 @@ * along with this program. If not, see . */ -#ifndef __CRYPTONIGHT_P_H__ -#define __CRYPTONIGHT_P_H__ +#ifndef __CRYPTONIGHT_X86_H__ +#define __CRYPTONIGHT_X86_H__ #ifdef __GNUC__ @@ -448,4 +448,4 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, extra_hashes[ctx->state1[0] & 3](ctx->state1, 200, static_cast(output) + 32); } -#endif /* __CRYPTONIGHT_P_H__ */ +#endif /* __CRYPTONIGHT_X86_H__ */ diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index 4b1d346f..99321c4e 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -27,7 +27,7 @@ #pragma once -#if defined(__aarch64__) +#if defined(XMRIG_ARM) # include "crypto/SSE2NEON.h" #elif defined(__GNUC__) # include diff --git a/src/log/ConsoleLog.cpp b/src/log/ConsoleLog.cpp index 45733858..3656d48c 100644 --- a/src/log/ConsoleLog.cpp +++ b/src/log/ConsoleLog.cpp @@ -145,7 +145,7 @@ void ConsoleLog::print(va_list args) } if (!isWritable()) { - fprintf(stdout, m_buf); + fputs(m_buf, stdout); fflush(stdout); } else { From 905f9190ae3960f1da37a03f9286863b92318c74 Mon Sep 17 00:00:00 2001 From: xmrig Date: Wed, 29 Nov 2017 17:54:12 +0300 Subject: [PATCH 26/58] Update CHANGELOG.md --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 8a40a859..0f5deeb6 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,4 +1,6 @@ # v2.4.3 + - [#94](https://github.com/xmrig/xmrig/issues/94#issuecomment-342019257) [#216](https://github.com/xmrig/xmrig/issues/216) Added **ARMv8** and **ARMv7** support. Hardware AES supported, thanks [Imran Yusuff](https://github.com/imranyusuff). + - [#157](https://github.com/xmrig/xmrig/issues/157) [#196](https://github.com/xmrig/xmrig/issues/196) Fixed Linux compile issues. - [#184](https://github.com/xmrig/xmrig/issues/184) Fixed cache size detection for CPUs with disabled Hyper-Threading. # v2.4.2 From b68b2a907bb0ace576e1081c0e5bd75f2317243e Mon Sep 17 00:00:00 2001 From: xmrig Date: Wed, 29 Nov 2017 18:49:28 +0300 Subject: [PATCH 27/58] Update CHANGELOG.md --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 0f5deeb6..54314eca 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,6 +2,7 @@ - [#94](https://github.com/xmrig/xmrig/issues/94#issuecomment-342019257) [#216](https://github.com/xmrig/xmrig/issues/216) Added **ARMv8** and **ARMv7** support. Hardware AES supported, thanks [Imran Yusuff](https://github.com/imranyusuff). - [#157](https://github.com/xmrig/xmrig/issues/157) [#196](https://github.com/xmrig/xmrig/issues/196) Fixed Linux compile issues. - [#184](https://github.com/xmrig/xmrig/issues/184) Fixed cache size detection for CPUs with disabled Hyper-Threading. + - [#200](https://github.com/xmrig/xmrig/issues/200) In some cases miner was doesn't write log to stdout. # v2.4.2 - [#60](https://github.com/xmrig/xmrig/issues/60) Added FreeBSD support, thanks [vcambur](https://github.com/vcambur). From e458c561398e50f7e54339ae4a9c130c0dc70793 Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 30 Nov 2017 02:11:15 +0300 Subject: [PATCH 28/58] v2.4.3 --- src/version.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/version.h b/src/version.h index 8d2e992f..c362e7be 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.2" +#define APP_VERSION "2.4.3" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com" @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 2 +#define APP_VER_BUILD 3 #define APP_VER_REV 0 #ifdef _MSC_VER From fbd100ef10565a148dc1e5928b8b2d6343bb0325 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 16 Dec 2017 19:27:11 +0700 Subject: [PATCH 29/58] #262 Reduce cmake version requirement to 2.8. --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0a1f238a..377bdb94 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.0) +cmake_minimum_required(VERSION 2.8) project(xmrig) option(WITH_LIBCPUID "Use Libcpuid" ON) From 114a9b041dc1fe9195d7923d2a5396b97c45e8f3 Mon Sep 17 00:00:00 2001 From: XMRig Date: Tue, 2 Jan 2018 12:24:57 +0700 Subject: [PATCH 30/58] #279 Add missing stdio header --- src/Platform_mac.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/Platform_mac.cpp b/src/Platform_mac.cpp index 5e53aacb..ba541f1d 100644 --- a/src/Platform_mac.cpp +++ b/src/Platform_mac.cpp @@ -22,6 +22,7 @@ */ +#include #include #include #include @@ -41,11 +42,11 @@ static inline char *createUserAgent() char *buf = new char[max]; -# ifdef XMRIG_NVIDIA_PROJECT - const int cudaVersion = cuda_get_runtime_version(); - snprintf(buf, max, "%s/%s (Macintosh; Intel Mac OS X) libuv/%s CUDA/%d.%d clang/%d.%d.%d", APP_NAME, APP_VERSION, uv_version_string(), cudaVersion / 1000, cudaVersion % 100, __clang_major__, __clang_minor__, __clang_patchlevel__); -# else - snprintf(buf, max, "%s/%s (Macintosh; Intel Mac OS X) libuv/%s clang/%d.%d.%d", APP_NAME, APP_VERSION, uv_version_string(), __clang_major__, __clang_minor__, __clang_patchlevel__); +# ifdef XMRIG_NVIDIA_PROJECT + const int cudaVersion = cuda_get_runtime_version(); + snprintf(buf, max, "%s/%s (Macintosh; Intel Mac OS X) libuv/%s CUDA/%d.%d clang/%d.%d.%d", APP_NAME, APP_VERSION, uv_version_string(), cudaVersion / 1000, cudaVersion % 100, __clang_major__, __clang_minor__, __clang_patchlevel__); +# else + snprintf(buf, max, "%s/%s (Macintosh; Intel Mac OS X) libuv/%s clang/%d.%d.%d", APP_NAME, APP_VERSION, uv_version_string(), __clang_major__, __clang_minor__, __clang_patchlevel__); # endif return buf; From 1b025f681cdb7dcc7c98fd8cf82ee353e80d2262 Mon Sep 17 00:00:00 2001 From: XMRig Date: Tue, 2 Jan 2018 13:41:00 +0700 Subject: [PATCH 31/58] Remove extra semicolon. --- src/net/Client.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/net/Client.cpp b/src/net/Client.cpp index 88134ae7..8e8ebcfd 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -582,11 +582,11 @@ void Client::onRead(uv_stream_t *stream, ssize_t nread, const uv_buf_t *buf) LOG_ERR("[%s:%u] read error: \"%s\"", client->m_url.host(), client->m_url.port(), uv_strerror((int) nread)); } - return client->close();; + return client->close(); } if ((size_t) nread > (sizeof(m_buf) - 8 - client->m_recvBufPos)) { - return client->close();; + return client->close(); } client->m_recvBufPos += nread; @@ -623,7 +623,7 @@ void Client::onResolved(uv_getaddrinfo_t *req, int status, struct addrinfo *res) auto client = getClient(req->data); if (status < 0) { LOG_ERR("[%s:%u] DNS error: \"%s\"", client->m_url.host(), client->m_url.port(), uv_strerror(status)); - return client->reconnect();; + return client->reconnect(); } addrinfo *ptr = res; From 785df621833319b380f1af2ee936a6bb05be2a9e Mon Sep 17 00:00:00 2001 From: XMRig Date: Tue, 2 Jan 2018 13:49:31 +0700 Subject: [PATCH 32/58] Update README.md. --- README.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/README.md b/README.md index 50ab830b..b4880b38 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@ # XMRig -XMRig is high performance Monero (XMR) CPU miner, with the official full Windows support. -Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 complete rewritten from scratch on C++. +XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows. +Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. * This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. @@ -89,7 +89,7 @@ Since version 0.8.0. ## Common Issues ### HUGE PAGES unavailable * Run XMRig as Administrator. -* Since version 0.8.0 XMRig automatically enable SeLockMemoryPrivilege for current user, but reboot or sign out still required. [Manual instruction](https://msdn.microsoft.com/en-gb/library/ms190730.aspx). +* Since version 0.8.0 XMRig automatically enables SeLockMemoryPrivilege for current user, but reboot or sign out still required. [Manual instruction](https://msdn.microsoft.com/en-gb/library/ms190730.aspx). ## Other information * No HTTP support, only stratum protocol support. @@ -106,7 +106,7 @@ Please note performance is highly dependent on system load. The numbers above ar ### Maximum performance checklist * Idle operating system. * Do not exceed optimal thread count. -* Use modern CPUs with AES-NI instructuon set. +* Use modern CPUs with AES-NI instruction set. * Try setup optimal cpu affinity. * Enable fast memory (Large/Huge pages). From 5b88213f61ac41e62b906595b60ffb62527ff650 Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 4 Jan 2018 11:38:32 +0700 Subject: [PATCH 33/58] Fix wrong signal handle. --- src/App.cpp | 10 ++++++---- src/App.h | 4 +++- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/App.cpp b/src/App.cpp index 1aae7ae0..c08a8be2 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -92,7 +92,9 @@ App::App(int argc, char **argv) : m_network = new Network(m_options); - uv_signal_init(uv_default_loop(), &m_signal); + uv_signal_init(uv_default_loop(), &m_sigHUP); + uv_signal_init(uv_default_loop(), &m_sigINT); + uv_signal_init(uv_default_loop(), &m_sigTERM); } @@ -114,9 +116,9 @@ int App::exec() return 0; } - uv_signal_start(&m_signal, App::onSignal, SIGHUP); - uv_signal_start(&m_signal, App::onSignal, SIGTERM); - uv_signal_start(&m_signal, App::onSignal, SIGINT); + uv_signal_start(&m_sigHUP, App::onSignal, SIGHUP); + uv_signal_start(&m_sigINT, App::onSignal, SIGINT); + uv_signal_start(&m_sigTERM, App::onSignal, SIGTERM); background(); diff --git a/src/App.h b/src/App.h index 781f78f2..fcb3b71b 100644 --- a/src/App.h +++ b/src/App.h @@ -60,7 +60,9 @@ private: Httpd *m_httpd; Network *m_network; Options *m_options; - uv_signal_t m_signal; + uv_signal_t m_sigHUP; + uv_signal_t m_sigINT; + uv_signal_t m_sigTERM; }; From 8b7a737ceb14871fd09ad4b190cd126e079852d9 Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 5 Jan 2018 17:23:39 +0700 Subject: [PATCH 34/58] Fix recent MSVC 2017 version detection. --- src/version.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/version.h b/src/version.h index c362e7be..f869db8a 100644 --- a/src/version.h +++ b/src/version.h @@ -4,7 +4,7 @@ * Copyright 2014 Lucas Jones * Copyright 2014-2016 Wolf9466 * Copyright 2016 Jay D Dee - * Copyright 2016-2017 XMRig + * Copyright 2016-2018 XMRig * * * This program is free software: you can redistribute it and/or modify @@ -27,10 +27,10 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.3" +#define APP_VERSION "2.4.4" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" -#define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com" +#define APP_COPYRIGHT "Copyright (C) 2016-2018 xmrig.com" #define APP_KIND "cpu" #define APP_VER_MAJOR 2 @@ -39,7 +39,7 @@ #define APP_VER_REV 0 #ifdef _MSC_VER -# if (_MSC_VER == 1910 || _MSC_VER == 1911) +# if (_MSC_VER >= 1910) # define MSVC_VERSION 2017 # elif _MSC_VER == 1900 # define MSVC_VERSION 2015 From 49b45ddd18461558e80b3e7c0eb741409072fd78 Mon Sep 17 00:00:00 2001 From: XMRig Date: Fri, 5 Jan 2018 19:41:19 +0700 Subject: [PATCH 35/58] Add libmicrohttpd version to --version output. --- src/Options.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/Options.cpp b/src/Options.cpp index b1197223..3eaf07ce 100644 --- a/src/Options.cpp +++ b/src/Options.cpp @@ -33,6 +33,11 @@ #endif +#ifndef XMRIG_NO_HTTPD +# include +#endif + + #include "Cpu.h" #include "donate.h" #include "net/Url.h" @@ -665,6 +670,10 @@ void Options::showVersion() "\n"); printf("\nlibuv/%s\n", uv_version_string()); + +# ifndef XMRIG_NO_HTTPD + printf("libmicrohttpd/%s\n", MHD_get_version()); +# endif } From f93187b024610ed83f41e18a5b6145ff7b91f61d Mon Sep 17 00:00:00 2001 From: stanz2g Date: Sat, 6 Jan 2018 17:07:07 +0800 Subject: [PATCH 36/58] can build without microhttpd when WITH_HTTPD=OFF --- CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/CMakeLists.txt b/CMakeLists.txt index 377bdb94..1e1673ea 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -195,6 +195,7 @@ if (WITH_HTTPD) message(FATAL_ERROR "microhttpd NOT found: use `-DWITH_HTTPD=OFF` to build without http deamon support") endif() else() + set(MHD_LIBRARY "") add_definitions(/DXMRIG_NO_HTTPD) add_definitions(/DXMRIG_NO_API) endif() From d73bee81abe74c962a423053c19c834300de5268 Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 7 Jan 2018 21:36:49 +0700 Subject: [PATCH 37/58] Update README.md --- README.md | 53 ++++++++++++++++++++++++++++------------------------- 1 file changed, 28 insertions(+), 25 deletions(-) diff --git a/README.md b/README.md index b4880b38..6ab4b6a2 100644 --- a/README.md +++ b/README.md @@ -50,31 +50,34 @@ For failover you can add multiple pools, maximum count not limited. ### Options ``` - -a, --algo=ALGO cryptonight (default) or cryptonight-lite - -o, --url=URL URL of mining server - -O, --userpass=U:P username:password pair for mining server - -u, --user=USERNAME username for mining server - -p, --pass=PASSWORD password for mining server - -t, --threads=N number of miner threads - -v, --av=N algorithm variation, 0 auto select - -k, --keepalive send keepalived for prevent timeout (need pool support) - -r, --retries=N number of times to retry before switch to backup server (default: 5) - -R, --retry-pause=N time to pause between retries (default: 5) - --cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1 - --cpu-priority set process priority (0 idle, 2 normal to 5 highest) - --no-huge-pages disable huge pages support - --no-color disable colored output - --donate-level=N donate level, default 5% (5 minutes in 100 minutes) - --user-agent set custom user-agent string for pool - -B, --background run the miner in the background - -c, --config=FILE load a JSON-format configuration file - -l, --log-file=FILE log all output to a file - --max-cpu-usage=N maximum CPU usage for automatic threads mode (default 75) - --safe safe adjust threads and av settings for current CPU - --nicehash enable nicehash support - --print-time=N print hashrate report every N seconds - -h, --help display this help and exit - -V, --version output version information and exit + -a, --algo=ALGO cryptonight (default) or cryptonight-lite + -o, --url=URL URL of mining server + -O, --userpass=U:P username:password pair for mining server + -u, --user=USERNAME username for mining server + -p, --pass=PASSWORD password for mining server + -t, --threads=N number of miner threads + -v, --av=N algorithm variation, 0 auto select + -k, --keepalive send keepalived for prevent timeout (need pool support) + -r, --retries=N number of times to retry before switch to backup server (default: 5) + -R, --retry-pause=N time to pause between retries (default: 5) + --cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1 + --cpu-priority set process priority (0 idle, 2 normal to 5 highest) + --no-huge-pages disable huge pages support + --no-color disable colored output + --donate-level=N donate level, default 5% (5 minutes in 100 minutes) + --user-agent set custom user-agent string for pool + -B, --background run the miner in the background + -c, --config=FILE load a JSON-format configuration file + -l, --log-file=FILE log all output to a file + --max-cpu-usage=N maximum CPU usage for automatic threads mode (default 75) + --safe safe adjust threads and av settings for current CPU + --nicehash enable nicehash/xmrig-proxy support + --print-time=N print hashrate report every N seconds + --api-port=N port for the miner API + --api-access-token=T access token for API + --api-worker-id=ID custom worker-id for API + -h, --help display this help and exit + -V, --version output version information and exit ``` Also you can use configuration via config file, default **config.json**. You can load multiple config files and combine it with command line options. From 038bb1f6bc2c422a7c7c5a4c23bc2129de4cdbf0 Mon Sep 17 00:00:00 2001 From: XMRig Date: Wed, 10 Jan 2018 16:56:08 +0700 Subject: [PATCH 38/58] Fix version. --- src/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/version.h b/src/version.h index f869db8a..52058eec 100644 --- a/src/version.h +++ b/src/version.h @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 3 +#define APP_VER_BUILD 4 #define APP_VER_REV 0 #ifdef _MSC_VER From e6540229cba5bdb52c3a80615bb0f5266f63d4db Mon Sep 17 00:00:00 2001 From: XMRig Date: Wed, 10 Jan 2018 22:55:45 +0700 Subject: [PATCH 39/58] #328 Added guard to prevent paused message spam and crash. --- src/App.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/App.cpp b/src/App.cpp index c08a8be2..1c00e4fb 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -166,8 +166,10 @@ void App::onConsoleCommand(char command) case 'p': case 'P': - LOG_INFO(m_options->colors() ? "\x1B[01;33mpaused\x1B[0m, press \x1B[01;35mr\x1B[0m to resume" : "paused, press 'r' to resume"); - Workers::setEnabled(false); + if (Workers::isEnabled()) { + LOG_INFO(m_options->colors() ? "\x1B[01;33mpaused\x1B[0m, press \x1B[01;35mr\x1B[0m to resume" : "paused, press 'r' to resume"); + Workers::setEnabled(false); + } break; case 'r': From 916cf0ae0da6ac9a59bebb86a6106d0e34d3eb96 Mon Sep 17 00:00:00 2001 From: xmrig Date: Thu, 11 Jan 2018 15:08:24 +0700 Subject: [PATCH 40/58] Update CHANGELOG.md --- CHANGELOG.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 54314eca..878ff984 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,9 @@ +# v2.4.4 + - Added libmicrohttpd version to --version output. + - Fixed bug in singal handler, in some cases miner wasn't shutdown properly. + - Fixed recent MSVC 2017 version detection. + - [#279](https://github.com/xmrig/xmrig/pull/279) Fixed build on some macOS versions. + # v2.4.3 - [#94](https://github.com/xmrig/xmrig/issues/94#issuecomment-342019257) [#216](https://github.com/xmrig/xmrig/issues/216) Added **ARMv8** and **ARMv7** support. Hardware AES supported, thanks [Imran Yusuff](https://github.com/imranyusuff). - [#157](https://github.com/xmrig/xmrig/issues/157) [#196](https://github.com/xmrig/xmrig/issues/196) Fixed Linux compile issues. From 56ffa7af794c0eebaad557d1218b6ee8f766d4e5 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 20 Jan 2018 12:58:43 +0700 Subject: [PATCH 41/58] #341 Fix wrong exit code. --- src/App.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/App.cpp b/src/App.cpp index 1c00e4fb..2eb81f56 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -113,7 +113,7 @@ App::~App() int App::exec() { if (!m_options) { - return 0; + return 2; } uv_signal_start(&m_sigHUP, App::onSignal, SIGHUP); From 9bceb65ad87e64e6e88599e0d6988cbea51c5555 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 20 Jan 2018 10:43:56 +0100 Subject: [PATCH 42/58] +15% boost with non-AES CPU Performance boost validated on Core 2 Quad processor under Windows 10. But it's Windows/MS Visual C++ specific. --- src/crypto/soft_aes.h | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index 99321c4e..148f39c1 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -91,10 +91,17 @@ alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); static inline __m128i soft_aesenc(__m128i in, __m128i key) { - const uint32_t x0 = _mm_cvtsi128_si32(in); - const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); - const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); - const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); +#if defined(_MSC_VER) + const uint32_t x0 = in.m128i_u32[0]; + const uint32_t x1 = in.m128i_u32[1]; + const uint32_t x2 = in.m128i_u32[2]; + const uint32_t x3 = in.m128i_u32[3]; +#else + const uint32_t x0 = _mm_cvtsi128_si32(in); + const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); + const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); + const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); +#endif __m128i out = _mm_set_epi32( (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), From 631fd755c814b772dc2bf95fe3c54a3273c4607b Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 20 Jan 2018 20:43:31 +0700 Subject: [PATCH 43/58] #341 Added option --dry-run. --- src/App.cpp | 26 ++++++++++++++++++++------ src/App.h | 1 + src/Options.cpp | 14 +++++++++++--- src/Options.h | 2 ++ 4 files changed, 34 insertions(+), 9 deletions(-) diff --git a/src/App.cpp b/src/App.cpp index 2eb81f56..d656acc8 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -130,6 +130,13 @@ int App::exec() Mem::allocate(m_options->algo(), m_options->threads(), m_options->doubleHash(), m_options->hugePages()); Summary::print(); + if (m_options->dryRun()) { + LOG_NOTICE("OK"); + release(); + + return 0; + } + # ifndef XMRIG_NO_API Api::start(); # endif @@ -146,12 +153,7 @@ int App::exec() const int r = uv_run(uv_default_loop(), UV_RUN_DEFAULT); uv_loop_close(uv_default_loop()); - delete m_network; - - Options::release(); - Mem::release(); - Platform::release(); - + release(); return r; } @@ -200,6 +202,18 @@ void App::close() } +void App::release() +{ + if (m_network) { + delete m_network; + } + + Options::release(); + Mem::release(); + Platform::release(); +} + + void App::onSignal(uv_signal_t *handle, int signum) { switch (signum) diff --git a/src/App.h b/src/App.h index fcb3b71b..1b96040d 100644 --- a/src/App.h +++ b/src/App.h @@ -51,6 +51,7 @@ protected: private: void background(); void close(); + void release(); static void onSignal(uv_signal_t *handle, int signum); diff --git a/src/Options.cpp b/src/Options.cpp index 3eaf07ce..4e7c75ca 100644 --- a/src/Options.cpp +++ b/src/Options.cpp @@ -101,12 +101,16 @@ static char const short_options[] = "a:c:khBp:Px:r:R:s:t:T:o:u:O:v:Vl:S"; static struct option const options[] = { { "algo", 1, nullptr, 'a' }, + { "api-access-token", 1, nullptr, 4001 }, + { "api-port", 1, nullptr, 4000 }, + { "api-worker-id", 1, nullptr, 4002 }, { "av", 1, nullptr, 'v' }, { "background", 0, nullptr, 'B' }, { "config", 1, nullptr, 'c' }, { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, + { "dry-run", 0, nullptr, 5000 }, { "help", 0, nullptr, 'h' }, { "keepalive", 0, nullptr ,'k' }, { "log-file", 1, nullptr, 'l' }, @@ -126,9 +130,6 @@ static struct option const options[] = { { "user-agent", 1, nullptr, 1008 }, { "userpass", 1, nullptr, 'O' }, { "version", 0, nullptr, 'V' }, - { "api-port", 1, nullptr, 4000 }, - { "api-access-token", 1, nullptr, 4001 }, - { "api-worker-id", 1, nullptr, 4002 }, { 0, 0, 0, 0 } }; @@ -141,6 +142,7 @@ static struct option const config_options[] = { { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, + { "dry-run", 0, nullptr, 5000 }, { "huge-pages", 0, nullptr, 1009 }, { "log-file", 1, nullptr, 'l' }, { "max-cpu-usage", 1, nullptr, 1004 }, @@ -205,6 +207,7 @@ Options::Options(int argc, char **argv) : m_background(false), m_colors(true), m_doubleHash(false), + m_dryRun(false), m_hugePages(true), m_ready(false), m_safe(false), @@ -384,6 +387,7 @@ bool Options::parseArg(int key, const char *arg) case 'S': /* --syslog */ case 1005: /* --safe */ case 1006: /* --nicehash */ + case 5000: /* --dry-run */ return parseBoolean(key, true); case 1002: /* --no-color */ @@ -557,6 +561,10 @@ bool Options::parseBoolean(int key, bool enable) m_colors = enable; break; + case 5000: /* --dry-run */ + m_dryRun = enable; + break; + default: break; } diff --git a/src/Options.h b/src/Options.h index 9070888f..6f074917 100644 --- a/src/Options.h +++ b/src/Options.h @@ -59,6 +59,7 @@ public: inline bool background() const { return m_background; } inline bool colors() const { return m_colors; } inline bool doubleHash() const { return m_doubleHash; } + inline bool dryRun() const { return m_dryRun; } inline bool hugePages() const { return m_hugePages; } inline bool syslog() const { return m_syslog; } inline const char *apiToken() const { return m_apiToken; } @@ -110,6 +111,7 @@ private: bool m_background; bool m_colors; bool m_doubleHash; + bool m_dryRun; bool m_hugePages; bool m_ready; bool m_safe; From 15fe6ce23f4aa2654bb8b458463e6213ee867486 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 27 Jan 2018 11:42:22 +0100 Subject: [PATCH 44/58] Remove compilation warnings under MSVC --- src/api/NetworkState.cpp | 4 ++-- src/net/Client.cpp | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/api/NetworkState.cpp b/src/api/NetworkState.cpp index bae290d0..d3ffddd3 100644 --- a/src/api/NetworkState.cpp +++ b/src/api/NetworkState.cpp @@ -46,7 +46,7 @@ NetworkState::NetworkState() : int NetworkState::connectionTime() const { - return m_active ? ((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0; + return m_active ? (int)((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0; } @@ -56,7 +56,7 @@ uint32_t NetworkState::avgTime() const return 0; } - return (uint32_t) connectionTime() / m_latency.size(); + return connectionTime() / (uint32_t)m_latency.size(); } diff --git a/src/net/Client.cpp b/src/net/Client.cpp index 8e8ebcfd..fcaec8eb 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -532,7 +532,7 @@ void Client::onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t auto client = getClient(handle->data); buf->base = &client->m_recvBuf.base[client->m_recvBufPos]; - buf->len = client->m_recvBuf.len - client->m_recvBufPos; + buf->len = client->m_recvBuf.len - (ULONG)client->m_recvBufPos; } From 9a28ad590ca6137bf5e19ba477e3f379527bbd73 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sun, 28 Jan 2018 12:58:19 +0100 Subject: [PATCH 45/58] up to 20% perf increase with Cryptonight with non-AES CPU This time, the performance increase is got with MSVC and GCC. On non-AES CPU, there were an useless load/store SSE2 register. The last MSVC "hack" is replaced by a portable code and he's more complete (a load is saved). On my C2Q6600, with 3 thread, I have +16% with MSVC2015 and +20% with GCC 7.3, compared to official 2.4.4 version. --- src/crypto/CryptoNight_arm.h | 30 +++++++++-------- src/crypto/CryptoNight_x86.h | 62 ++++++++++++++++++------------------ src/crypto/soft_aes.h | 17 +++------- 3 files changed, 52 insertions(+), 57 deletions(-) diff --git a/src/crypto/CryptoNight_arm.h b/src/crypto/CryptoNight_arm.h index 15be6c3d..17bba7af 100644 --- a/src/crypto/CryptoNight_arm.h +++ b/src/crypto/CryptoNight_arm.h @@ -194,14 +194,14 @@ template static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7) { if (SOFT_AES) { - *x0 = soft_aesenc(*x0, key); - *x1 = soft_aesenc(*x1, key); - *x2 = soft_aesenc(*x2, key); - *x3 = soft_aesenc(*x3, key); - *x4 = soft_aesenc(*x4, key); - *x5 = soft_aesenc(*x5, key); - *x6 = soft_aesenc(*x6, key); - *x7 = soft_aesenc(*x7, key); + *x0 = soft_aesenc((uint32_t*)x0, key); + *x1 = soft_aesenc((uint32_t*)x1, key); + *x2 = soft_aesenc((uint32_t*)x2, key); + *x3 = soft_aesenc((uint32_t*)x3, key); + *x4 = soft_aesenc((uint32_t*)x4, key); + *x5 = soft_aesenc((uint32_t*)x5, key); + *x6 = soft_aesenc((uint32_t*)x6, key); + *x7 = soft_aesenc((uint32_t*)x7, key); } # ifndef XMRIG_ARMv7 else { @@ -361,12 +361,13 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + __m128i cx; if (SOFT_AES) { - cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); } else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); # ifndef XMRIG_ARMv7 cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); # endif @@ -425,14 +426,15 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx1 = h1[0] ^ h1[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + __m128i cx0, cx1; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); } else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 362a1a9f..786d28f1 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -193,14 +193,14 @@ template static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7) { if (SOFT_AES) { - *x0 = soft_aesenc(*x0, key); - *x1 = soft_aesenc(*x1, key); - *x2 = soft_aesenc(*x2, key); - *x3 = soft_aesenc(*x3, key); - *x4 = soft_aesenc(*x4, key); - *x5 = soft_aesenc(*x5, key); - *x6 = soft_aesenc(*x6, key); - *x7 = soft_aesenc(*x7, key); + *x0 = soft_aesenc((uint32_t*)x0, key); + *x1 = soft_aesenc((uint32_t*)x1, key); + *x2 = soft_aesenc((uint32_t*)x2, key); + *x3 = soft_aesenc((uint32_t*)x3, key); + *x4 = soft_aesenc((uint32_t*)x4, key); + *x5 = soft_aesenc((uint32_t*)x5, key); + *x6 = soft_aesenc((uint32_t*)x6, key); + *x7 = soft_aesenc((uint32_t*)x7, key); } else { *x0 = _mm_aesenc_si128(*x0, key); @@ -324,19 +324,18 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + __m128i cx; - if (SOFT_AES) { - cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); - } - else { - cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); - } - - _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); - idx0 = EXTRACT64(cx); - bx0 = cx; + if (SOFT_AES) { + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + } + else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); + } + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); + idx0 = EXTRACT64(cx); + bx0 = cx; uint64_t hi, lo, cl, ch; cl = ((uint64_t*) &l0[idx0 & MASK])[0]; @@ -386,18 +385,19 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx0 = h0[0] ^ h0[4]; uint64_t idx1 = h1[0] ^ h1[4]; - for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx0, cx1; - if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); - } - else { - cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); - } + if (SOFT_AES) { + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + } + else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); + cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); + } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); _mm_store_si128((__m128i *) &l1[idx1 & MASK], _mm_xor_si128(bx1, cx1)); diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index 148f39c1..b7698ac4 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -89,19 +89,12 @@ alignas(16) const uint32_t saes_table[4][256] = { saes_data(saes_u0), saes_data(saes_u1), saes_data(saes_u2), saes_data(saes_u3) }; alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); -static inline __m128i soft_aesenc(__m128i in, __m128i key) +static inline __m128i soft_aesenc(const uint32_t* in, __m128i key) { -#if defined(_MSC_VER) - const uint32_t x0 = in.m128i_u32[0]; - const uint32_t x1 = in.m128i_u32[1]; - const uint32_t x2 = in.m128i_u32[2]; - const uint32_t x3 = in.m128i_u32[3]; -#else - const uint32_t x0 = _mm_cvtsi128_si32(in); - const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); - const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); - const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); -#endif + const uint32_t x0 = in[0]; + const uint32_t x1 = in[1]; + const uint32_t x2 = in[2]; + const uint32_t x3 = in[3]; __m128i out = _mm_set_epi32( (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), From d2964576c7da7784d060116a4970f60f6b895f10 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sun, 28 Jan 2018 18:13:00 +0100 Subject: [PATCH 46/58] Compilation error under FreeBSD ULONG is not recognized under this OS, so replaced it with more portable definition. --- src/net/Client.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/net/Client.cpp b/src/net/Client.cpp index fcaec8eb..fb83acd2 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -532,7 +532,7 @@ void Client::onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t auto client = getClient(handle->data); buf->base = &client->m_recvBuf.base[client->m_recvBufPos]; - buf->len = client->m_recvBuf.len - (ULONG)client->m_recvBufPos; + buf->len = client->m_recvBuf.len - (unsigned long)client->m_recvBufPos; } From a91759086288313d639ea353b3c9c6ebaaa605a2 Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:14:39 +0200 Subject: [PATCH 47/58] Update README.md --- README.md | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/README.md b/README.md index 6ab4b6a2..2d32c639 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,12 @@ # XMRig +[![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) +[![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) +[![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) +> XMRig - Monero (XMR) CPU miner + XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows. Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. From 9f92449e15fe2bc53bf3b65d6e40536e83384430 Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:54:58 +0200 Subject: [PATCH 48/58] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 2d32c639..7209f1d0 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # XMRig [![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) From 75f462f0e18ecbd9cea933da8dc872d9f50c3f5f Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:58:11 +0200 Subject: [PATCH 49/58] Update README.md --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 7209f1d0..5f5a9db0 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # XMRig [![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date-pre/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) From 037abd703720cc52f228c99d1e0e205ce48abd85 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 3 Feb 2018 16:03:14 +0100 Subject: [PATCH 50/58] Correct L2 cache size calculation for Intel Core 2 family This is a workaround for total L2 cache size calculation of Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue. These processors have L2 cache shared by 2 cores. There is maybe more CPU with L2 shared cache, but I am sure that these models are concerned and they are not so numerous. A better way would be to modify libcpuid to implement L2 cache counting. --- src/Cpu.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/Cpu.cpp b/src/Cpu.cpp index ff6f49e9..b122e156 100644 --- a/src/Cpu.cpp +++ b/src/Cpu.cpp @@ -100,7 +100,13 @@ void Cpu::initCommon() m_l2_cache = data.l2_cache * (m_totalCores / 2) * m_sockets; m_l2_exclusive = true; } - else { + // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue + // These processors have L2 cache shared by 2 cores. + else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { + int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; + m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; + } + else{ m_l2_cache = data.l2_cache > 0 ? data.l2_cache * m_totalCores * m_sockets : 0; } From e78e810cfea6bb5594a6be3720378d83e29a3675 Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 8 Feb 2018 17:02:32 +0700 Subject: [PATCH 51/58] Fix code style, replace tabs to space. --- src/Cpu.cpp | 14 +++++------ src/crypto/CryptoNight_x86.h | 46 ++++++++++++++++++------------------ src/crypto/soft_aes.h | 30 +++++++++++------------ 3 files changed, 45 insertions(+), 45 deletions(-) diff --git a/src/Cpu.cpp b/src/Cpu.cpp index b122e156..a619781e 100644 --- a/src/Cpu.cpp +++ b/src/Cpu.cpp @@ -100,13 +100,13 @@ void Cpu::initCommon() m_l2_cache = data.l2_cache * (m_totalCores / 2) * m_sockets; m_l2_exclusive = true; } - // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue - // These processors have L2 cache shared by 2 cores. - else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { - int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; - m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; - } - else{ + // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue + // These processors have L2 cache shared by 2 cores. + else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { + int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; + m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; + } + else{ m_l2_cache = data.l2_cache > 0 ? data.l2_cache * m_totalCores * m_sockets : 0; } diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 786d28f1..927aab72 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -324,18 +324,18 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; + __m128i cx; - if (SOFT_AES) { - cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); - } - else { - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); - } - _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); - idx0 = EXTRACT64(cx); - bx0 = cx; + if (SOFT_AES) { + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + } + else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); + } + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); + idx0 = EXTRACT64(cx); + bx0 = cx; uint64_t hi, lo, cl, ch; cl = ((uint64_t*) &l0[idx0 & MASK])[0]; @@ -385,19 +385,19 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx0 = h0[0] ^ h0[4]; uint64_t idx1 = h1[0] ^ h1[4]; - for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0, cx1; + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx0, cx1; - if (SOFT_AES) { - cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); - } - else { - cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); - cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); - } + if (SOFT_AES) { + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + } + else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); + cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); + } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); _mm_store_si128((__m128i *) &l1[idx1 & MASK], _mm_xor_si128(bx1, cx1)); diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index b7698ac4..0703f98d 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -91,32 +91,32 @@ alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); static inline __m128i soft_aesenc(const uint32_t* in, __m128i key) { - const uint32_t x0 = in[0]; - const uint32_t x1 = in[1]; - const uint32_t x2 = in[2]; - const uint32_t x3 = in[3]; + const uint32_t x0 = in[0]; + const uint32_t x1 = in[1]; + const uint32_t x2 = in[2]; + const uint32_t x3 = in[3]; - __m128i out = _mm_set_epi32( - (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), - (saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]), - (saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]), - (saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24])); + __m128i out = _mm_set_epi32( + (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), + (saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]), + (saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]), + (saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24])); - return _mm_xor_si128(out, key); + return _mm_xor_si128(out, key); } static inline uint32_t sub_word(uint32_t key) { - return (saes_sbox[key >> 24 ] << 24) | - (saes_sbox[(key >> 16) & 0xff] << 16 ) | - (saes_sbox[(key >> 8) & 0xff] << 8 ) | - saes_sbox[key & 0xff]; + return (saes_sbox[key >> 24 ] << 24) | + (saes_sbox[(key >> 16) & 0xff] << 16 ) | + (saes_sbox[(key >> 8) & 0xff] << 8 ) | + saes_sbox[key & 0xff]; } #if defined(__clang__) || defined(XMRIG_ARM) static inline uint32_t _rotr(uint32_t value, uint32_t amount) { - return (value >> amount) | (value << ((32 - amount) & 31)); + return (value >> amount) | (value << ((32 - amount) & 31)); } #endif From 184f79ad3f51db2e49aebd06565b05a4d358ab2f Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 8 Feb 2018 17:21:12 +0700 Subject: [PATCH 52/58] Fix code style, replace tabs to space #2. --- src/crypto/CryptoNight_arm.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/crypto/CryptoNight_arm.h b/src/crypto/CryptoNight_arm.h index 17bba7af..4ac14f34 100644 --- a/src/crypto/CryptoNight_arm.h +++ b/src/crypto/CryptoNight_arm.h @@ -361,13 +361,13 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; + __m128i cx; if (SOFT_AES) { cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); } else { - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); # ifndef XMRIG_ARMv7 cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); # endif @@ -433,8 +433,8 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); } else { - cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); From f0604d1e975b26ec1a2e5cba85e5d6daf8ebd074 Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:06:10 +0700 Subject: [PATCH 53/58] Update README.md --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 6ab4b6a2..c33216d1 100644 --- a/README.md +++ b/README.md @@ -3,6 +3,7 @@ XMRig is a high performance Monero (XMR) CPU miner, with official support for Wi Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. * This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). +* You can use [config.xmrig.com](https://config.xmrig.com/) to generate/edit/share your configurations. :new: * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. From c9acc2912e9e71d234648bec2595137bec355dfc Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:32:36 +0700 Subject: [PATCH 54/58] Update CHANGELOG.md --- CHANGELOG.md | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 878ff984..c23c5d29 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,8 @@ +# v2.4.5 +- [#324](https://github.com/xmrig/xmrig/pull/324) Fixed build without libmicrohttpd (CMake cache issue). +- [#341](https://github.com/xmrig/xmrig/issues/341) Fixed wrong exit code and added command line option `--dry-run`. +- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase with for non-AES CPU and fixed Intel Core 2 cache detection. + # v2.4.4 - Added libmicrohttpd version to --version output. - Fixed bug in singal handler, in some cases miner wasn't shutdown properly. From cc22c9d61c3b4fb9b40c4895596fbf2ee48a8530 Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:49:37 +0700 Subject: [PATCH 55/58] Update README.md --- README.md | 1 - 1 file changed, 1 deletion(-) diff --git a/README.md b/README.md index ef385625..d208dfce 100644 --- a/README.md +++ b/README.md @@ -5,7 +5,6 @@ [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) -> XMRig - Monero (XMR) CPU miner XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows. Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. From f5a0429f0da3bc867c0c92d82e178467f4de2ab3 Mon Sep 17 00:00:00 2001 From: xmrig Date: Mon, 19 Feb 2018 04:17:50 +0700 Subject: [PATCH 56/58] Update README.md --- README.md | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/README.md b/README.md index d208dfce..b563d5b0 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,6 @@ XMRig is a high performance Monero (XMR) CPU miner, with official support for Wi Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. * This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). -* You can use [config.xmrig.com](https://config.xmrig.com/) to generate/edit/share your configurations. :new: * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. @@ -45,16 +44,7 @@ Originally based on cpuminer-multi with heavy optimizations/rewrites and removin * Clone with `git clone https://github.com/xmrig/xmrig.git` :hammer: [Build instructions](https://github.com/xmrig/xmrig/wiki/Build). ## Usage -### Basic example -``` -xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k -``` - -### Failover -``` -xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k -``` -For failover you can add multiple pools, maximum count not limited. +Use [config.xmrig.com](https://config.xmrig.com/xmrig) to generate, edit or share configurations. ### Options ``` From 9af8ceb063289c5d809cb7a181cb17b5088fec2e Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 19 Feb 2018 04:31:50 +0700 Subject: [PATCH 57/58] v2.4.5 RC --- src/version.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/version.h b/src/version.h index 52058eec..d34b45a5 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.4" +#define APP_VERSION "2.4.5" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2018 xmrig.com" @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 4 +#define APP_VER_BUILD 5 #define APP_VER_REV 0 #ifdef _MSC_VER From 79345119c60e53d0d29ef2bde92c50483e009bad Mon Sep 17 00:00:00 2001 From: xmrig Date: Mon, 19 Feb 2018 15:58:44 +0700 Subject: [PATCH 58/58] Update CHANGELOG.md --- CHANGELOG.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index c23c5d29..8e2e6522 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,7 +1,7 @@ # v2.4.5 - [#324](https://github.com/xmrig/xmrig/pull/324) Fixed build without libmicrohttpd (CMake cache issue). - [#341](https://github.com/xmrig/xmrig/issues/341) Fixed wrong exit code and added command line option `--dry-run`. -- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase with for non-AES CPU and fixed Intel Core 2 cache detection. +- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase for non-AES CPU and fixed Intel Core 2 cache detection. # v2.4.4 - Added libmicrohttpd version to --version output.