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https://github.com/xmrig/xmrig.git
synced 2025-01-11 05:14:40 +00:00
Fixed warnings.
This commit is contained in:
parent
bcae974ea1
commit
4f49533e98
7 changed files with 21 additions and 23 deletions
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@ -26,6 +26,7 @@
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#define XMRIG_HASHRATE_H
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#include <stddef.h>
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#include <stdint.h>
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@ -90,12 +90,12 @@ static void load_block(block *dst, const void *input) {
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}
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}
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static void store_block(void *output, const block *src) {
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unsigned i;
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for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
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store64((uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
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}
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}
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//static void store_block(void *output, const block *src) {
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// unsigned i;
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// for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
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// store64((uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
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// }
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//}
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/***************Memory functions*****************/
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@ -484,7 +484,6 @@ void rxa2_initial_hash(uint8_t *blockhash, argon2_context *context, argon2_type
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int rxa2_argon_initialize(argon2_instance_t *instance, argon2_context *context) {
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uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
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int result = ARGON2_OK;
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if (instance == NULL || context == NULL)
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return ARGON2_INCORRECT_PARAMETER;
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@ -90,7 +90,7 @@ namespace randomx {
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}
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static void executeBytecode(InstructionByteCode* bytecode, uint8_t* scratchpad, ProgramConfiguration& config) {
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for (int pc = 0; pc < RandomX_CurrentConfig.ProgramSize; ++pc) {
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for (int pc = 0; pc < static_cast<int>(RandomX_CurrentConfig.ProgramSize); ++pc) {
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auto& ibc = bytecode[pc];
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executeInstruction(ibc, pc, scratchpad, config);
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}
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@ -121,7 +121,7 @@ namespace randomx {
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cache->reciprocalCache.clear();
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randomx::Blake2Generator gen(key, keySize);
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for (int i = 0; i < RandomX_CurrentConfig.CacheAccesses; ++i) {
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for (uint32_t i = 0; i < RandomX_CurrentConfig.CacheAccesses; ++i) {
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randomx::generateSuperscalar(cache->programs[i], gen);
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for (unsigned j = 0; j < cache->programs[i].getSize(); ++j) {
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auto& instr = cache->programs[i](j);
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@ -194,7 +194,7 @@ namespace randomx {
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static const uint8_t NOP7[] = { 0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00 };
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static const uint8_t NOP8[] = { 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 };
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static const uint8_t* NOPX[] = { NOP1, NOP2, NOP3, NOP4, NOP5, NOP6, NOP7, NOP8 };
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// static const uint8_t* NOPX[] = { NOP1, NOP2, NOP3, NOP4, NOP5, NOP6, NOP7, NOP8 };
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size_t JitCompilerX86::getCodeSize() {
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return codePos - prologueSize;
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@ -233,7 +233,7 @@ RandomX_ConfigurationBase RandomX_CurrentConfig;
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extern "C" {
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randomx_cache *randomx_alloc_cache(randomx_flags flags) {
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randomx_cache *cache;
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randomx_cache *cache = nullptr;
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try {
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cache = new randomx_cache();
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@ -297,7 +297,7 @@ extern "C" {
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}
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randomx_dataset *randomx_alloc_dataset(randomx_flags flags) {
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randomx_dataset *dataset;
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randomx_dataset *dataset = nullptr;
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try {
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dataset = new randomx_dataset();
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@ -430,14 +430,12 @@ extern "C" {
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assert(inputSize == 0 || input != nullptr);
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assert(output != nullptr);
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alignas(16) uint64_t tempHash[8];
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int blakeResult = blake2b(tempHash, sizeof(tempHash), input, inputSize, nullptr, 0);
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assert(blakeResult == 0);
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blake2b(tempHash, sizeof(tempHash), input, inputSize, nullptr, 0);
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machine->initScratchpad(&tempHash);
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machine->resetRoundingMode();
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for (int chain = 0; chain < RandomX_CurrentConfig.ProgramCount - 1; ++chain) {
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for (uint32_t chain = 0; chain < RandomX_CurrentConfig.ProgramCount - 1; ++chain) {
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machine->run(&tempHash);
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blakeResult = blake2b(tempHash, sizeof(tempHash), machine->getRegisterFile(), sizeof(randomx::RegisterFile), nullptr, 0);
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assert(blakeResult == 0);
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blake2b(tempHash, sizeof(tempHash), machine->getRegisterFile(), sizeof(randomx::RegisterFile), nullptr, 0);
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}
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machine->run(&tempHash);
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machine->getFinalResult(output, RANDOMX_HASH_SIZE);
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@ -500,7 +500,7 @@ namespace randomx {
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// * either the last instruction applied to the register or its source must be different than this instruction
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// - this avoids optimizable instruction sequences such as "xor r1, r2; xor r1, r2" or "ror r, C1; ror r, C2" or "add r, C1; add r, C2"
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// * register r5 cannot be the destination of the IADD_RS instruction (limitation of the x86 lea instruction)
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for (unsigned i = 0; i < 8; ++i) {
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for (int i = 0; i < 8; ++i) {
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if (registers[i].latency <= cycle && (canReuse_ || i != src_) && (allowChainedMul || opGroup_ != SuperscalarInstructionType::IMUL_R || registers[i].lastOpGroup != SuperscalarInstructionType::IMUL_R) && (registers[i].lastOpGroup != opGroup_ || registers[i].lastOpPar != opGroupPar_) && (info_->getType() != SuperscalarInstructionType::IADD_RS || i != RegisterNeedsDisplacement))
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availableRegisters.push_back(i);
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}
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@ -581,7 +581,7 @@ namespace randomx {
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static int scheduleUop(ExecutionPort::type uop, ExecutionPort::type(&portBusy)[CYCLE_MAP_SIZE][3], int cycle) {
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//The scheduling here is done optimistically by checking port availability in order P5 -> P0 -> P1 to not overload
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//port P1 (multiplication) by instructions that can go to any port.
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for (; cycle < RandomX_CurrentConfig.SuperscalarLatency + 4; ++cycle) {
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for (; cycle < static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency) + 4; ++cycle) {
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if ((uop & ExecutionPort::P5) != 0 && !portBusy[cycle][2]) {
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if (commit) {
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if (trace) std::cout << "; P5 at cycle " << cycle << std::endl;
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@ -626,7 +626,7 @@ namespace randomx {
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}
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else {
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//macro-ops with 2 uOPs are scheduled conservatively by requiring both uOPs to execute in the same cycle
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for (; cycle < RandomX_CurrentConfig.SuperscalarLatency + 4; ++cycle) {
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for (; cycle < static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency) + 4; ++cycle) {
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int cycle1 = scheduleUop<false>(mop.getUop1(), portBusy, cycle);
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int cycle2 = scheduleUop<false>(mop.getUop2(), portBusy, cycle);
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@ -669,7 +669,7 @@ namespace randomx {
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//Since a decode cycle produces on average 3.45 macro-ops and there are only 3 ALU ports, execution ports are always
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//saturated first. The cycle limit is present only to guarantee loop termination.
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//Program size is limited to SuperscalarMaxSize instructions.
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for (decodeCycle = 0; decodeCycle < RandomX_CurrentConfig.SuperscalarLatency && !portsSaturated && programSize < 3 * RandomX_CurrentConfig.SuperscalarLatency + 2; ++decodeCycle) {
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for (decodeCycle = 0; decodeCycle < static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency) && !portsSaturated && programSize < 3 * static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency) + 2; ++decodeCycle) {
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//select a decode configuration
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decodeBuffer = decodeBuffer->fetchNext(currentInstruction.getType(), decodeCycle, mulCount, gen);
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@ -683,7 +683,7 @@ namespace randomx {
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//if we have issued all macro-ops for the current RandomX instruction, create a new instruction
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if (macroOpIndex >= currentInstruction.getInfo().getSize()) {
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if (portsSaturated || programSize >= 3 * RandomX_CurrentConfig.SuperscalarLatency + 2)
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if (portsSaturated || programSize >= 3 * static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency) + 2)
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break;
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//select an instruction so that the first macro-op fits into the current slot
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currentInstruction.createForSlot(gen, decodeBuffer->getCounts()[bufferIndex], decodeBuffer->getIndex(), decodeBuffer->getSize() == bufferIndex + 1, bufferIndex == 0);
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@ -777,7 +777,7 @@ namespace randomx {
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macroOpCount++;
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//terminating condition
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if (scheduleCycle >= RandomX_CurrentConfig.SuperscalarLatency) {
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if (scheduleCycle >= static_cast<int>(RandomX_CurrentConfig.SuperscalarLatency)) {
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portsSaturated = true;
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}
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cycle = topCycle;
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