Added CPU vendor enum.

src/backend/cpu/interfaces/ICpuInfo.h

@@ -37,6 +37,12 @@ namespace xmrig {
 class ICpuInfo
 {
 public:
+    enum Vendor {
+        VENDOR_UNKNOWN,
+        VENDOR_INTEL,
+        VENDOR_AMD
+    };
+
     virtual ~ICpuInfo() = default;
 
 #   if defined(__x86_64__) || defined(_M_AMD64) || defined (__arm64__) || defined (__aarch64__)
@@ -58,6 +64,7 @@ public:
     virtual size_t nodes() const                                                    = 0;
     virtual size_t packages() const                                                 = 0;
     virtual size_t threads() const                                                  = 0;
+    virtual Vendor vendor() const                                                   = 0;
 };
 
 

src/backend/cpu/platform/AdvancedCpuInfo.cpp

@@ -103,6 +103,13 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
     cpu_brand_string(m_brand, data.brand_str);
     snprintf(m_backend, sizeof m_backend, "libcpuid/%s", cpuid_lib_version());
 
+    if (data.vendor == ::VENDOR_INTEL) {
+        m_vendor = VENDOR_INTEL;
+    }
+    else if (data.vendor == ::VENDOR_AMD) {
+        m_vendor = VENDOR_AMD;
+    }
+
     m_threads  = static_cast<size_t>(data.total_logical_cpus);
     m_packages = std::max<size_t>(threads() / static_cast<size_t>(data.num_logical_cpus), 1);
     m_cores    = static_cast<size_t>(data.num_cores) * m_packages;
@@ -111,13 +118,13 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
     const auto l2 = static_cast<size_t>(data.l2_cache);
 
     // Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97
-    if (data.vendor == VENDOR_AMD && data.ext_family >= 0x15 && data.ext_family < 0x17) {
+    if (m_vendor == VENDOR_AMD && data.ext_family >= 0x15 && data.ext_family < 0x17) {
         m_L2 = l2 * (cores() / 2) * m_packages;
         m_L2_exclusive = true;
     }
     // Workaround for Intel Pentium Dual-Core, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue
     // These processors have L2 cache shared by 2 cores.
-    else if (data.vendor == VENDOR_INTEL && data.ext_family == 0x06 && (data.ext_model == 0x0E || data.ext_model == 0x0F || data.ext_model == 0x17)) {
+    else if (m_vendor == VENDOR_INTEL && data.ext_family == 0x06 && (data.ext_model == 0x0E || data.ext_model == 0x0F || data.ext_model == 0x17)) {
         size_t l2_count_per_socket = cores() > 1 ? cores() / 2 : 1;
         m_L2 = data.l2_cache > 0 ? l2 * l2_count_per_socket * m_packages : 0;
     }
@@ -131,10 +138,10 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
     if (data.flags[CPU_FEATURE_AES]) {
         m_aes = true;
 
-        if (data.vendor == VENDOR_AMD) {
+        if (m_vendor == VENDOR_AMD) {
             m_assembly = (data.ext_family >= 23) ? Assembly::RYZEN : Assembly::BULLDOZER;
         }
-        else if (data.vendor == VENDOR_INTEL) {
+        else if (m_vendor == VENDOR_INTEL) {
             m_assembly = Assembly::INTEL;
         }
     }

src/backend/cpu/platform/AdvancedCpuInfo.h

@@ -52,6 +52,7 @@ protected:
     inline size_t nodes() const override            { return 0; }
     inline size_t packages() const override         { return m_packages; }
     inline size_t threads() const override          { return m_threads; }
+    inline Vendor vendor() const override           { return m_vendor; }
 
 private:
     Assembly m_assembly;
@@ -66,6 +67,7 @@ private:
     size_t m_L3           = 0;
     size_t m_packages     = 1;
     size_t m_threads      = 0;
+    Vendor m_vendor       = VENDOR_UNKNOWN;
 };
 
 

src/backend/cpu/platform/BasicCpuInfo.cpp

@@ -151,9 +151,7 @@ static inline bool has_pdpe1gb()
 
 
 xmrig::BasicCpuInfo::BasicCpuInfo() :
-    m_brand(),
     m_threads(std::thread::hardware_concurrency()),
-    m_assembly(Assembly::NONE),
     m_aes(has_aes_ni()),
     m_avx2(has_avx2()),
     m_pdpe1gb(has_pdpe1gb())
@@ -172,12 +170,15 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
         memcpy(vendor + 8, &data[2], 4);
 
         if (memcmp(vendor, "AuthenticAMD", 12) == 0) {
+            m_vendor = VENDOR_AMD;
+
             cpuid(PROCESSOR_INFO, data);
             const int32_t family = get_masked(data[EAX_Reg], 12, 8) + get_masked(data[EAX_Reg], 28, 20);
 
             m_assembly = family >= 23 ? Assembly::RYZEN : Assembly::BULLDOZER;
         }
-        else {
+        else if (memcmp(vendor, "GenuineIntel", 12) == 0) {
+            m_vendor   = VENDOR_INTEL;
             m_assembly = Assembly::INTEL;
         }
     }

src/backend/cpu/platform/BasicCpuInfo.h

@@ -52,16 +52,18 @@ protected:
     inline size_t nodes() const override            { return 0; }
     inline size_t packages() const override         { return 1; }
     inline size_t threads() const override          { return m_threads; }
+    inline Vendor vendor() const override           { return m_vendor; }
 
 protected:
-    char m_brand[64 + 6];
+    char m_brand[64 + 6]{};
     size_t m_threads;
 
 private:
-    Assembly m_assembly;
+    Assembly m_assembly     = Assembly::NONE;
-    bool m_aes;
+    bool m_aes              = false;
-    const bool m_avx2;
+    const bool m_avx2       = false;
-    const bool m_pdpe1gb;
+    const bool m_pdpe1gb    = false;
+    Vendor m_vendor         = VENDOR_UNKNOWN;
 };
 
 

src/backend/cpu/platform/BasicCpuInfo_arm.cpp

@@ -22,7 +22,7 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <string.h>
+#include <cstring>
 #include <thread>
 
 
@@ -36,11 +36,7 @@
 
 
 xmrig::BasicCpuInfo::BasicCpuInfo() :
-    m_brand(),
+    m_threads(std::thread::hardware_concurrency())
-    m_threads(std::thread::hardware_concurrency()),
-    m_aes(false),
-    m_avx2(false),
-    m_pdpe1gb(false)
 {
 #   ifdef XMRIG_ARMv8
     memcpy(m_brand, "ARMv8", 5);