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Update libcpuid to recent git version.

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XMRig 2018-09-23 13:05:03 +03:00
parent cf76d9254a
commit 1f609c7ebd
8 changed files with 991 additions and 929 deletions
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1661
src/3rdparty/libcpuid/asm-bits.c vendored
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124
src/3rdparty/libcpuid/asm-bits.h vendored
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@ -1,53 +1,71 @@
/* /*
* Copyright 2008 Veselin Georgiev, * Copyright 2008 Veselin Georgiev,
* anrieffNOSPAM @ mgail_DOT.com (convert to gmail) * anrieffNOSPAM @ mgail_DOT.com (convert to gmail)
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the * notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution. * documentation and/or other materials provided with the distribution.
* *
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef __ASM_BITS_H__ #ifndef __ASM_BITS_H__
#define __ASM_BITS_H__ #define __ASM_BITS_H__
#include "libcpuid.h" #include "libcpuid.h"
/* Determine Compiler: */ /* Determine Compiler: */
#if defined(_MSC_VER) #if defined(_MSC_VER)
# define COMPILER_MICROSOFT #if !defined(COMPILER_MICROSOFT)
#elif defined(__GNUC__) # define COMPILER_MICROSOFT
# define COMPILER_GCC #endif
#endif #elif defined(__GNUC__)
#if !defined(COMPILER_GCC)
/* Determine Platform */ # define COMPILER_GCC
#if defined(__x86_64__) || defined(_M_AMD64) #endif
# define PLATFORM_X64 #elif defined(__clang__)
#elif defined(__i386__) || defined(_M_IX86) #if !defined(COMPILER_CLANG)
# define PLATFORM_X86 # define COMPILER_CLANG
#endif #endif
#endif
/* Under Windows/AMD64 with MSVC, inline assembly isn't supported */
#if (defined(COMPILER_GCC) && defined(PLATFORM_X64)) || defined(PLATFORM_X86) /* Determine Platform */
# define INLINE_ASM_SUPPORTED #if defined(__x86_64__) || defined(_M_AMD64)
#endif #if !defined(PLATFORM_X64)
# define PLATFORM_X64
int cpuid_exists_by_eflags(void); #endif
void exec_cpuid(uint32_t *regs); #elif defined(__i386__) || defined(_M_IX86)
void busy_sse_loop(int cycles); #if !defined(PLATFORM_X86)
# define PLATFORM_X86
#endif /* __ASM_BITS_H__ */ #endif
#elif defined(__ARMEL__)
#if !defined(PLATFORM_ARM)
# define PLATFORM_ARM
#endif
#endif
/* Under Windows/AMD64 with MSVC, inline assembly isn't supported */
#if (((defined(COMPILER_GCC) || defined(COMPILER_CLANG))) && \
(defined(PLATFORM_X64) || defined(PLATFORM_X86) || defined(PLATFORM_ARM))) || \
(defined(COMPILER_MICROSOFT) && defined(PLATFORM_X86))
# define INLINE_ASM_SUPPORTED
#endif
int cpuid_exists_by_eflags(void);
void exec_cpuid(uint32_t *regs);
void busy_sse_loop(int cycles);
#endif /* __ASM_BITS_H__ */

56
src/3rdparty/libcpuid/cpuid_main.c vendored
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@ -221,42 +221,42 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
static cpu_vendor_t cpuid_vendor_identify(const uint32_t *raw_vendor, char *vendor_str) static cpu_vendor_t cpuid_vendor_identify(const uint32_t *raw_vendor, char *vendor_str)
{ {
int i; int i;
cpu_vendor_t vendor = VENDOR_UNKNOWN; cpu_vendor_t vendor = VENDOR_UNKNOWN;
const struct { cpu_vendor_t vendor; char match[16]; } const struct { cpu_vendor_t vendor; char match[16]; }
matchtable[NUM_CPU_VENDORS] = { matchtable[NUM_CPU_VENDORS] = {
/* source: http://www.sandpile.org/ia32/cpuid.htm */ /* source: http://www.sandpile.org/ia32/cpuid.htm */
{ VENDOR_INTEL , "GenuineIntel" }, { VENDOR_INTEL , "GenuineIntel" },
{ VENDOR_AMD , "AuthenticAMD" }, { VENDOR_AMD , "AuthenticAMD" },
{ VENDOR_CYRIX , "CyrixInstead" }, { VENDOR_CYRIX , "CyrixInstead" },
{ VENDOR_NEXGEN , "NexGenDriven" }, { VENDOR_NEXGEN , "NexGenDriven" },
{ VENDOR_TRANSMETA , "GenuineTMx86" }, { VENDOR_TRANSMETA , "GenuineTMx86" },
{ VENDOR_UMC , "UMC UMC UMC " }, { VENDOR_UMC , "UMC UMC UMC " },
{ VENDOR_CENTAUR , "CentaurHauls" }, { VENDOR_CENTAUR , "CentaurHauls" },
{ VENDOR_RISE , "RiseRiseRise" }, { VENDOR_RISE , "RiseRiseRise" },
{ VENDOR_SIS , "SiS SiS SiS " }, { VENDOR_SIS , "SiS SiS SiS " },
{ VENDOR_NSC , "Geode by NSC" }, { VENDOR_NSC , "Geode by NSC" },
}; };
memcpy(vendor_str + 0, &raw_vendor[1], 4); memcpy(vendor_str + 0, &raw_vendor[1], 4);
memcpy(vendor_str + 4, &raw_vendor[3], 4); memcpy(vendor_str + 4, &raw_vendor[3], 4);
memcpy(vendor_str + 8, &raw_vendor[2], 4); memcpy(vendor_str + 8, &raw_vendor[2], 4);
vendor_str[12] = 0; vendor_str[12] = 0;
/* Determine vendor: */ /* Determine vendor: */
for (i = 0; i < NUM_CPU_VENDORS; i++) for (i = 0; i < NUM_CPU_VENDORS; i++)
if (!strcmp(vendor_str, matchtable[i].match)) { if (!strcmp(vendor_str, matchtable[i].match)) {
vendor = matchtable[i].vendor; vendor = matchtable[i].vendor;
break; break;
} }
return vendor; return vendor;
} }
static int cpuid_basic_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data) static int cpuid_basic_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
{ {
int i, j, basic, xmodel, xfamily, ext; int i, j, basic, xmodel, xfamily, ext;
char brandstr[64] = {0}; char brandstr[64] = {0};
data->vendor = cpuid_vendor_identify(raw->basic_cpuid[0], data->vendor_str); data->vendor = cpuid_vendor_identify(raw->basic_cpuid[0], data->vendor_str);
if (data->vendor == VENDOR_UNKNOWN) if (data->vendor == VENDOR_UNKNOWN)
return set_error(ERR_CPU_UNKN); return set_error(ERR_CPU_UNKN);

39
src/3rdparty/libcpuid/libcpuid.h vendored
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@ -60,7 +60,7 @@
*/ */
/** @mainpage A simple libcpuid introduction /** @mainpage A simple libcpuid introduction
* *
* LibCPUID provides CPU identification and access to the CPUID and RDTSC * LibCPUID provides CPU identification and access to the CPUID and RDTSC
* instructions on the x86. * instructions on the x86.
* <p> * <p>
@ -82,6 +82,7 @@
*/ */
/** @defgroup libcpuid LibCPUID /** @defgroup libcpuid LibCPUID
* @brief LibCPUID provides CPU identification
@{ */ @{ */
/* Include some integer type specifications: */ /* Include some integer type specifications: */
@ -535,23 +536,23 @@ typedef enum {
* @brief Describes common library error codes * @brief Describes common library error codes
*/ */
typedef enum { typedef enum {
ERR_OK = 0, /*!< "No error" */ ERR_OK = 0, /*!< No error */
ERR_NO_CPUID = -1, /*!< "CPUID instruction is not supported" */ ERR_NO_CPUID = -1, /*!< CPUID instruction is not supported */
ERR_NO_RDTSC = -2, /*!< "RDTSC instruction is not supported" */ ERR_NO_RDTSC = -2, /*!< RDTSC instruction is not supported */
ERR_NO_MEM = -3, /*!< "Memory allocation failed" */ ERR_NO_MEM = -3, /*!< Memory allocation failed */
ERR_OPEN = -4, /*!< "File open operation failed" */ ERR_OPEN = -4, /*!< File open operation failed */
ERR_BADFMT = -5, /*!< "Bad file format" */ ERR_BADFMT = -5, /*!< Bad file format */
ERR_NOT_IMP = -6, /*!< "Not implemented" */ ERR_NOT_IMP = -6, /*!< Not implemented */
ERR_CPU_UNKN = -7, /*!< "Unsupported processor" */ ERR_CPU_UNKN = -7, /*!< Unsupported processor */
ERR_NO_RDMSR = -8, /*!< "RDMSR instruction is not supported" */ ERR_NO_RDMSR = -8, /*!< RDMSR instruction is not supported */
ERR_NO_DRIVER= -9, /*!< "RDMSR driver error (generic)" */ ERR_NO_DRIVER= -9, /*!< RDMSR driver error (generic) */
ERR_NO_PERMS = -10, /*!< "No permissions to install RDMSR driver" */ ERR_NO_PERMS = -10, /*!< No permissions to install RDMSR driver */
ERR_EXTRACT = -11, /*!< "Cannot extract RDMSR driver (read only media?)" */ ERR_EXTRACT = -11, /*!< Cannot extract RDMSR driver (read only media?) */
ERR_HANDLE = -12, /*!< "Bad handle" */ ERR_HANDLE = -12, /*!< Bad handle */
ERR_INVMSR = -13, /*!< "Invalid MSR" */ ERR_INVMSR = -13, /*!< Invalid MSR */
ERR_INVCNB = -14, /*!< "Invalid core number" */ ERR_INVCNB = -14, /*!< Invalid core number */
ERR_HANDLE_R = -15, /*!< "Error on handle read" */ ERR_HANDLE_R = -15, /*!< Error on handle read */
ERR_INVRANGE = -16, /*!< "Invalid given range" */ ERR_INVRANGE = -16, /*!< Invalid given range */
} cpu_error_t; } cpu_error_t;
/** /**
@ -668,7 +669,7 @@ struct cpu_epc_t cpuid_get_epc(int index, const struct cpu_raw_data_t* raw);
const char* cpuid_lib_version(void); const char* cpuid_lib_version(void);
#ifdef __cplusplus #ifdef __cplusplus
}; /* extern "C" */ } /* extern "C" */
#endif #endif

5
src/3rdparty/libcpuid/libcpuid_internal.h vendored
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@ -75,8 +75,9 @@ enum _intel_bits_t {
_3 = LBIT( 14 ), _3 = LBIT( 14 ),
_5 = LBIT( 15 ), _5 = LBIT( 15 ),
_7 = LBIT( 16 ), _7 = LBIT( 16 ),
XEON_ = LBIT( 17 ), _9 = LBIT( 17 ),
ATOM_ = LBIT( 18 ), XEON_ = LBIT( 18 ),
ATOM_ = LBIT( 19 ),
}; };
typedef enum _intel_bits_t intel_bits_t; typedef enum _intel_bits_t intel_bits_t;

28
src/3rdparty/libcpuid/libcpuid_types.h vendored
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@ -32,6 +32,32 @@
#ifndef __LIBCPUID_TYPES_H__ #ifndef __LIBCPUID_TYPES_H__
#define __LIBCPUID_TYPES_H__ #define __LIBCPUID_TYPES_H__
#include <stdint.h> #if !defined(_MSC_VER) || _MSC_VER >= 1600
# include <stdint.h>
#else
/* we have to provide our own: */
# if !defined(__int32_t_defined)
typedef int int32_t;
# endif
# if !defined(__uint32_t_defined)
typedef unsigned uint32_t;
# endif
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short int16_t;
typedef unsigned short uint16_t;
#if (defined _MSC_VER) && (_MSC_VER <= 1300)
/* MSVC 6.0: no long longs ... */
typedef signed __int64 int64_t;
typedef unsigned __int64 uint64_t;
#else
/* all other sane compilers: */
typedef signed long long int64_t;
typedef unsigned long long uint64_t;
#endif
#endif
#endif /* __LIBCPUID_TYPES_H__ */ #endif /* __LIBCPUID_TYPES_H__ */

4
src/3rdparty/libcpuid/recog_amd.c vendored
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@ -49,6 +49,10 @@ enum _amd_model_codes_t {
_1400, _1400,
_1500, _1500,
_1600, _1600,
_1900,
_2400,
_2500,
_2700,
}; };
static void load_amd_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data) static void load_amd_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)

3
src/3rdparty/libcpuid/recog_intel.c vendored
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@ -376,7 +376,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
bits |= bit_matchtable[i].bit; bits |= bit_matchtable[i].bit;
} }
if ((i = match_pattern(bs, "Core(TM) [im][357]")) != 0) { if ((i = match_pattern(bs, "Core(TM) [im][3579]")) != 0) {
bits |= CORE_; bits |= CORE_;
i--; i--;
switch (bs[i + 9]) { switch (bs[i + 9]) {
@ -387,6 +387,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
case '3': bits |= _3; break; case '3': bits |= _3; break;
case '5': bits |= _5; break; case '5': bits |= _5; break;
case '7': bits |= _7; break; case '7': bits |= _7; break;
case '9': bits |= _9; break;
} }
} }
for (i = 0; i < COUNT_OF(matchtable); i++) for (i = 0; i < COUNT_OF(matchtable); i++)